Both match prior generation processors as far as LBR and C-state MSRs
go (SDM rev 072) as well as applicability of the if_pschange_mc erratum
(recent spec updates).
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
master commit:
1fe406685cb19e9544681c6243e7d376deb0297e
master date: 2020-06-09 12:55:53 +0200
case 0x4E:
case 0x55:
case 0x5E:
+ /* Ice Lake */
+ case 0x7D:
+ case 0x7E:
/* Kaby Lake */
case 0x8E:
case 0x9E:
+ /* Comet Lake */
+ case 0xA5:
+ case 0xA6:
GET_PC2_RES(hw_res->pc2);
GET_CC7_RES(hw_res->cc7);
/* fall through */
case 0x4e: /* Skylake M */
case 0x5e: /* Skylake D */
case 0x55: /* Skylake-X / Cascade Lake */
+ case 0x7d: /* Ice Lake */
+ case 0x7e: /* Ice Lake */
case 0x8e: /* Kaby / Coffee / Whiskey Lake M */
case 0x9e: /* Kaby / Coffee / Whiskey Lake D */
+ case 0xa5: /* Comet Lake H/S */
+ case 0xa6: /* Comet Lake U */
return true;
/*
case 0x66:
/* Goldmont Plus */
case 0x7a:
+ /* Ice Lake */
+ case 0x7d: case 0x7e:
/* Kaby Lake */
case 0x8e: case 0x9e:
+ /* Comet Lake */
+ case 0xa5: case 0xa6:
return sk_lbr;
/* Atom */
case 0x1c: case 0x26: case 0x27: case 0x35: case 0x36: