Some board use dwc phy in MII mode, so do not fail to attach if this is
the case.
Only rockchip code uses the phy mode to program some custom syscon register.
PR: 260848
MFC after: 1 week
Sponsored by: Beckhoff Automation GmbH & Co. KG
(cherry picked from commit
da6252a6a099e6253207b69960e6762ce3cca0f8)
case MII_CONTYPE_RGMII_ID:
case MII_CONTYPE_RGMII_RXID:
case MII_CONTYPE_RGMII_TXID:
- sc->phy_mode = PHY_MODE_RGMII;
- break;
+ sc->phy_mode = PHY_MODE_RGMII;
+ break;
case MII_CONTYPE_RMII:
- sc->phy_mode = PHY_MODE_RMII;
- break;
+ sc->phy_mode = PHY_MODE_RMII;
+ break;
+ case MII_CONTYPE_MII:
+ sc->phy_mode = PHY_MODE_MII;
+ break;
default:
device_printf(dev, "Unsupported MII type\n");
return (ENXIO);
#define PHY_MODE_UNKNOWN 0x0
#define PHY_MODE_RMII 0x1
#define PHY_MODE_RGMII 0x2
+#define PHY_MODE_MII 0x3
#define MAC_CONFIGURATION 0x0
#define CONF_JD (1 << 22) /* jabber timer disable */