If the DT representing the ARM generic timer mentions a clock-frequency,
propragate it to the DT that is built for DOM0.
This is necessary as a workaround for boards (Odroid-XU) where CNTFRQ is not
set or returns a wrong value.
Ideally CNTFRQ should be set by the boot loader. The bootloader should respect
the ARM ARM (see B.8.1.1):
"The CNTFRQ register is UNKNOWN at reset, and therefore the counter
frequency must written to CNTFRQ as part of the system boot process."
For the Odroid-XU the SPL BL2 code is entered in NS HYP mode which prevents
the execution of the mcr call to set CNTFRQ.
Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Reviewed-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
int res;
const struct dt_irq *irq;
gic_interrupt_t intrs[3];
+ u32 clock_frequency;
+ bool_t clock_valid;
DPRINT("Create timer node\n");
if ( res )
return res;
+ clock_valid = dt_property_read_u32(dev, "clock-frequency",
+ &clock_frequency);
+ if ( clock_valid )
+ {
+ res = fdt_property_cell(fdt, "clock-frequency", clock_frequency);
+ if ( res )
+ return res;
+ }
+
res = fdt_end_node(fdt);
return res;