0x0040f10f CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_emulate_resync_only [ gfn = 0x%(1)16x ]
0x00801001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) cpu_freq_change [ %(1)dMHz -> %(2)dMHz ]
-0x00802001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) cpu_idle_entry [ C0 -> C%(1)d ]
-0x00802002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) cpu_idle_exit [ C%(1)d -> C0 ]
+0x00802001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) cpu_idle_entry [ C0 -> C%(1)d, acpi_pm_tick = %(2)d ]
+0x00802002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) cpu_idle_exit [ C%(1)d -> C0, acpi_pm_tick = %(2)d ]
case ACPI_STATE_C2:
if ( cx->type == ACPI_STATE_C1 || local_apic_timer_c2_ok )
{
- /* Trace cpu idle entry */
- TRACE_1D(TRC_PM_IDLE_ENTRY, cx->idx);
/* Get start time (ticks) */
t1 = inl(pmtmr_ioport);
+ /* Trace cpu idle entry */
+ TRACE_2D(TRC_PM_IDLE_ENTRY, cx->idx, t1);
/* Invoke C2 */
acpi_idle_do_entry(cx);
/* Get end time (ticks) */
t2 = inl(pmtmr_ioport);
/* Trace cpu idle exit */
- TRACE_1D(TRC_PM_IDLE_EXIT, cx->idx);
+ TRACE_2D(TRC_PM_IDLE_EXIT, cx->idx, t2);
/* Re-enable interrupts */
local_irq_enable();
ACPI_FLUSH_CPU_CACHE();
}
- /* Trace cpu idle entry */
- TRACE_1D(TRC_PM_IDLE_ENTRY, cx->idx);
/*
* Before invoking C3, be aware that TSC/APIC timer may be
* stopped by H/W. Without carefully handling of TSC/APIC stop issues,
/* Get start time (ticks) */
t1 = inl(pmtmr_ioport);
+ /* Trace cpu idle entry */
+ TRACE_2D(TRC_PM_IDLE_ENTRY, cx->idx, t1);
/* Invoke C3 */
acpi_idle_do_entry(cx);
/* Get end time (ticks) */
/* recovering TSC */
cstate_restore_tsc();
/* Trace cpu idle exit */
- TRACE_1D(TRC_PM_IDLE_EXIT, cx->idx);
+ TRACE_2D(TRC_PM_IDLE_EXIT, cx->idx, t2);
if ( power->flags.bm_check && power->flags.bm_control )
{