]> xenbits.xensource.com Git - people/royger/xen.git/commitdiff
x86/vtx: Remove opencoded MSR_ARCH_CAPS check
authorAndrew Cooper <andrew.cooper3@citrix.com>
Mon, 15 May 2023 15:59:25 +0000 (16:59 +0100)
committerAndrew Cooper <andrew.cooper3@citrix.com>
Wed, 24 May 2023 18:04:41 +0000 (19:04 +0100)
MSR_ARCH_CAPS data is now included in featureset information.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
xen/arch/x86/hvm/vmx/vmx.c
xen/arch/x86/include/asm/cpufeature.h

index 096c69251d58aaa545108e7b23b6af51c0e814f7..9dc16d0cc6b9100cd0af231782a81e6cb11c4b5d 100644 (file)
@@ -2849,8 +2849,6 @@ static void __init ler_to_fixup_check(void);
  */
 static bool __init has_if_pschange_mc(void)
 {
-    uint64_t caps = 0;
-
     /*
      * If we are virtualised, there is nothing we can do.  Our EPT tables are
      * shadowed by our hypervisor, and not walked by hardware.
@@ -2858,10 +2856,8 @@ static bool __init has_if_pschange_mc(void)
     if ( cpu_has_hypervisor )
         return false;
 
-    if ( cpu_has_arch_caps )
-        rdmsrl(MSR_ARCH_CAPABILITIES, caps);
-
-    if ( caps & ARCH_CAPS_IF_PSCHANGE_MC_NO )
+    /* Hardware reports itself as fixed. */
+    if ( cpu_has_if_pschange_mc_no )
         return false;
 
     /*
index d0ead8e7a51e151b79bb76ab8f2ef902ee04c676..e3154ec5800dd45d4a0293d75e5028572c2e1b5d 100644 (file)
@@ -182,6 +182,9 @@ static inline bool boot_cpu_has(unsigned int feat)
 #define cpu_has_avx_vnni_int8   boot_cpu_has(X86_FEATURE_AVX_VNNI_INT8)
 #define cpu_has_avx_ne_convert  boot_cpu_has(X86_FEATURE_AVX_NE_CONVERT)
 
+/* MSR_ARCH_CAPS */
+#define cpu_has_if_pschange_mc_no boot_cpu_has(X86_FEATURE_IF_PSCHANGE_MC_NO)
+
 /* Synthesized. */
 #define cpu_has_arch_perfmon    boot_cpu_has(X86_FEATURE_ARCH_PERFMON)
 #define cpu_has_cpuid_faulting  boot_cpu_has(X86_FEATURE_CPUID_FAULTING)