]> xenbits.xensource.com Git - people/andrewcoop/xen.git/commitdiff
xen/arm: vgic-v3: Move the emulation of ICC_SGI1R_EL1 in a separate helper
authorJulien Grall <julien.grall@arm.com>
Wed, 7 Dec 2016 12:33:52 +0000 (12:33 +0000)
committerStefano Stabellini <sstabellini@kernel.org>
Wed, 7 Dec 2016 22:46:39 +0000 (14:46 -0800)
The emulation of the co-processor register ICC_SGI1R is the same as the
system register ICC_SGI1R_EL1. So move the emulation outside and use the
newly introduced helper vreg_emulate_sysreg64 to abstract the access.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
xen/arch/arm/vgic-v3.c

index 139b3051c388847bc0f72783295e55d9da45fd80..ed588ab0a358cf09419c0ae025be6150f617b491 100644 (file)
@@ -31,6 +31,7 @@
 #include <asm/gic_v3_defs.h>
 #include <asm/vgic.h>
 #include <asm/vgic-emul.h>
+#include <asm/vreg.h>
 
 /*
  * PIDR2: Only bits[7:4] are not implementation defined. We are
@@ -1300,9 +1301,21 @@ static bool vgic_v3_to_sgi(struct vcpu *v, register_t sgir)
     return vgic_to_sgi(v, sgir, sgi_mode, virq, &target);
 }
 
+static bool vgic_v3_emulate_sgi1r(struct cpu_user_regs *regs, uint64_t *r,
+                                  bool read)
+{
+    /* WO */
+    if ( !read )
+        return vgic_v3_to_sgi(current, *r);
+    else
+    {
+        gdprintk(XENLOG_WARNING, "Reading SGI1R_EL1 - WO register\n");
+        return false;
+    }
+}
+
 static bool vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
 {
-    struct vcpu *v = current;
     struct hsr_sysreg sysreg = hsr.sysreg;
 
     ASSERT (hsr.ec == HSR_EC_SYSREG);
@@ -1315,14 +1328,8 @@ static bool vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
     switch ( hsr.bits & HSR_SYSREG_REGS_MASK )
     {
     case HSR_SYSREG_ICC_SGI1R_EL1:
-        /* WO */
-        if ( !sysreg.read )
-            return vgic_v3_to_sgi(v, get_user_reg(regs, sysreg.reg));
-        else
-        {
-            gprintk(XENLOG_WARNING, "Reading SGI1R_EL1 - WO register\n");
-            return false;
-        }
+        return vreg_emulate_sysreg64(regs, hsr, vgic_v3_emulate_sgi1r);
+
     default:
         return false;
     }