]> xenbits.xensource.com Git - xen.git/commitdiff
x86/cpuid: Infrastructure for leaves 7:1{ecx,edx}
authorAndrew Cooper <andrew.cooper3@citrix.com>
Fri, 3 Mar 2023 07:06:44 +0000 (08:06 +0100)
committerAndrew Cooper <andrew.cooper3@citrix.com>
Thu, 3 Aug 2023 18:13:39 +0000 (19:13 +0100)
We don't actually need ecx yet, but adding it in now will reduce the amount to
which leaf 7 is out of order in a featureset.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
(cherry picked from commit b4a23bf6293aadecfd03bf9e83974443e2eac9cb)

tools/misc/xen-cpuid.c
xen/arch/x86/cpu/common.c
xen/include/public/arch-x86/cpufeatureset.h
xen/include/xen/lib/x86/cpuid.h

index 5c944c24fe365d7b285d9add55bcc00e8e5b16e3..f7be8d12e98d5ced9f0474ca494e31b05d9fe667 100644 (file)
@@ -193,6 +193,14 @@ static const char *const str_7b1[32] =
 {
 };
 
+static const char *const str_7c1[32] =
+{
+};
+
+static const char *const str_7d1[32] =
+{
+};
+
 static const char *const str_7d2[32] =
 {
     [ 0] = "intel-psfd",
@@ -218,6 +226,8 @@ static const struct {
     { "0x80000021.eax",  "e21a", str_e21a },
     { "0x00000007:1.ebx", "7b1", str_7b1 },
     { "0x00000007:2.edx", "7d2", str_7d2 },
+    { "0x00000007:1.ecx", "7c1", str_7c1 },
+    { "0x00000007:1.edx", "7d1", str_7d1 },
 };
 
 #define COL_ALIGN "18"
index 40a81d63e2cee35d1d7cd6a1d183fe3926fc529e..7b93902585dff9f87a8f55f317749b300873af93 100644 (file)
@@ -435,7 +435,8 @@ static void generic_identify(struct cpuinfo_x86 *c)
                        cpuid_count(7, 1,
                                    &c->x86_capability[FEATURESET_7a1],
                                    &c->x86_capability[FEATURESET_7b1],
-                                   &tmp, &tmp);
+                                   &c->x86_capability[FEATURESET_7c1],
+                                   &c->x86_capability[FEATURESET_7d1]);
                if (max_subleaf >= 2)
                        cpuid_count(7, 2,
                                    &tmp, &tmp, &tmp,
index 41a358d575d396208685f549549515aea49b8f03..34d5a0648eea513a47b0d532ad83149da4a7678e 100644 (file)
@@ -298,6 +298,10 @@ XEN_CPUFEATURE(LFENCE_DISPATCH,    11*32+ 2) /*A  LFENCE always serializing */
 /* Intel-defined CPU features, CPUID level 0x00000007:2.edx, word 13 */
 XEN_CPUFEATURE(INTEL_PSFD,         13*32+ 0) /*A  MSR_SPEC_CTRL.PSFD */
 
+/* Intel-defined CPU features, CPUID level 0x00000007:1.ecx, word 14 */
+
+/* Intel-defined CPU features, CPUID level 0x00000007:1.edx, word 15 */
+
 #endif /* XEN_CPUFEATURE */
 
 /* Clean up from a default include.  Close the enum (for C). */
index 50be07c0eba089a587575541e8ae34a09203f522..fa98b371eef45077bf9bf379b24aaf99bf049698 100644 (file)
@@ -17,7 +17,9 @@
 #define FEATURESET_7a1   10 /* 0x00000007:1.eax    */
 #define FEATURESET_e21a  11 /* 0x80000021.eax      */
 #define FEATURESET_7b1   12 /* 0x00000007:1.ebx    */
-#define FEATURESET_7d2   13 /* 0x80000007:2.edx    */
+#define FEATURESET_7d2   13 /* 0x00000007:2.edx    */
+#define FEATURESET_7c1   14 /* 0x00000007:1.ecx    */
+#define FEATURESET_7d1   15 /* 0x00000007:1.edx    */
 
 struct cpuid_leaf
 {
@@ -194,7 +196,14 @@ struct cpuid_policy
                 uint32_t _7b1;
                 struct { DECL_BITFIELD(7b1); };
             };
-            uint32_t /* c */:32, /* d */:32;
+            union {
+                uint32_t _7c1;
+                struct { DECL_BITFIELD(7c1); };
+            };
+            union {
+                uint32_t _7d1;
+                struct { DECL_BITFIELD(7d1); };
+            };
 
             /* Subleaf 2. */
             uint32_t /* a */:32, /* b */:32, /* c */:32;
@@ -343,6 +352,8 @@ static inline void cpuid_policy_to_featureset(
     fs[FEATURESET_e21a] = p->extd.e21a;
     fs[FEATURESET_7b1] = p->feat._7b1;
     fs[FEATURESET_7d2] = p->feat._7d2;
+    fs[FEATURESET_7c1] = p->feat._7c1;
+    fs[FEATURESET_7d1] = p->feat._7d1;
 }
 
 /* Fill in a CPUID policy from a featureset bitmap. */
@@ -363,6 +374,8 @@ static inline void cpuid_featureset_to_policy(
     p->extd.e21a  = fs[FEATURESET_e21a];
     p->feat._7b1  = fs[FEATURESET_7b1];
     p->feat._7d2  = fs[FEATURESET_7d2];
+    p->feat._7c1  = fs[FEATURESET_7c1];
+    p->feat._7d1  = fs[FEATURESET_7d1];
 }
 
 static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p)