]> xenbits.xensource.com Git - people/julieng/boot-wrapper-aarch64.git/commitdiff
Clean up image layout
authorJean-Philippe Brucker <jean-philippe.brucker@arm.com>
Wed, 7 Oct 2015 18:20:43 +0000 (19:20 +0100)
committerMark Rutland <mark.rutland@arm.com>
Tue, 14 Jun 2016 16:49:11 +0000 (17:49 +0100)
This patch moves page tables and vectors to their own section, in order
to avoid big alignment gaps in the middle of .text or .data. We also
remove all .org directives, as they are not needed.

Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
boot.S
cache.S
mmu.S
model.lds.S
ns.S
psci.S
spin.S

diff --git a/boot.S b/boot.S
index c65590c8e8ecca7001e3aeabbbbb6875212b98a5..a0eccaec38d3858a611b11e3322015b55ca82529 100644 (file)
--- a/boot.S
+++ b/boot.S
@@ -36,5 +36,3 @@ _start:
        b       start_el3
 
        .ltorg
-
-       .org    0x100
diff --git a/cache.S b/cache.S
index 081b8a791de238f8998d4758d94945594bcff0bb..6ccf5786bee51a9ed1f8c5094f922136bb36b1c5 100644 (file)
--- a/cache.S
+++ b/cache.S
@@ -78,4 +78,3 @@ dcaches_done:
        ret
 
        .ltorg
-       .org 0x100
diff --git a/mmu.S b/mmu.S
index 5468b5e4ffc6d182ba78231de94837285501c07b..207340cf9ee231b930adfcd0c646bf9212f8e345 100644 (file)
--- a/mmu.S
+++ b/mmu.S
@@ -41,7 +41,7 @@
 #define BLOCK_DEV_1GB(_pa)     (DEV_ATTR_UPPER | BLOCK_1GB_PA(_pa) | \
                                 DEV_ATTR_LOWER | BLOCK_VALID)
 
-       .data
+       .section .pgtables, "w"
 
 #define BLOCK_INVALID  (0 << 0)
 
@@ -111,7 +111,7 @@ switch_to_idmap:
        dsb     sy
        isb
 
-       adr     x0, pgtable_l1
+       ldr     x0, =pgtable_l1
        msr     ttbr0_el3, x0
 
        ldr     x0, =MAIR_ATTR
index 09a2452faabb21910b0dc4e76d280ca084241feb..3d012ee69eb6a81b9e3d95e983f9fb2fbf77dbec 100644 (file)
@@ -21,12 +21,14 @@ INPUT(FILESYSTEM)
 SECTIONS
 {
        . = PHYS_OFFSET;
-       .text : { boot.o }
-       .text : { cache.o }
-       .text : { GIC }
-       .text : { mmu.o }
-       .text : { ns.o }
-       .text : { BOOTMETHOD }
+       .text : { boot.o(.text .data) }
+       .text : { cache.o(.text .data) }
+       .text : { GIC(.text .data) }
+       .text : { mmu.o(.text .data) }
+       .text : { ns.o(.text) }
+       .text : { BOOTMETHOD(.text .data) }
+       .text : { *(.vectors) }
+       .text : { *(.pgtables) }
        . = PHYS_OFFSET + MBOX_OFFSET;
        mbox = .;
        .mbox : { QUAD(0x0) }
diff --git a/ns.S b/ns.S
index d3feb4aea7474c29e3f9fb9965cd55ba9d2527f0..21b6d45c80570ff0139cf11528162dbdea1aa4a3 100644 (file)
--- a/ns.S
+++ b/ns.S
@@ -44,4 +44,3 @@ ns_init_system:
        ret
 
        .ltorg
-       .org 0x80
diff --git a/psci.S b/psci.S
index 8ad838ced9f0bd46868560d9c2410e14330cf918..548a4b8c61f2d18f3b79ec119a9821aa6eb67743 100644 (file)
--- a/psci.S
+++ b/psci.S
@@ -28,7 +28,7 @@
        b       \label
        .endm
 
-       .data
+       .section .vectors, "w"
 
        .align 11
 vector:
@@ -56,6 +56,7 @@ vector:
        ventry  err_exception
        ventry  err_exception
 
+       .data
        /*
         * Array of the CPU ID (MPIDR & MPIDR_ID_BITS) of each CPU in the system.
         * The index into the array is used as a logical id, and an index into
@@ -176,7 +177,7 @@ __find_logical_index:
        ret
 
 setup_vector:
-       adr     x0, vector
+       ldr     x0, =vector
        msr     VBAR_EL3, x0
        isb
        ret
diff --git a/spin.S b/spin.S
index 04101cc0b0a445b8fb77d85eb403f0b12b5726c9..00f21bf6c983681615964251774cf33e10d222ea 100644 (file)
--- a/spin.S
+++ b/spin.S
@@ -55,5 +55,3 @@ start_no_el3:
        b       kernel
 
        .ltorg
-
-       .org    0x80