]> xenbits.xensource.com Git - xen.git/commitdiff
xen/arm: correct flush_tlb_mask behaviour
authorJulien Grall <julien.grall@linaro.org>
Thu, 9 Jan 2014 16:58:03 +0000 (16:58 +0000)
committerIan Campbell <ian.campbell@citrix.com>
Wed, 15 Jan 2014 13:16:39 +0000 (13:16 +0000)
On ARM, flush_tlb_mask is used in the common code:
    - alloc_heap_pages: the flush is only be called if the new allocated
    page was used by a domain before. So we need to flush only TLB non-secure
non-hyp inner-shareable.
    - common/grant-table.c: every calls to flush_tlb_mask are used with
    the current domain. A flush TLB by current VMID inner-shareable is enough.

The current code only flush hypervisor TLB on the current PCPU. For now,
flush TLBs non-secure non-hyp on every PCPUs.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
xen/arch/arm/smp.c
xen/include/asm-arm/arm32/flushtlb.h
xen/include/asm-arm/arm64/flushtlb.h

index 4042db5507cca95d3539d95531b04392e383e5dd..30203b8883d7f46994abae28422027d64d3aea1a 100644 (file)
@@ -4,11 +4,12 @@
 #include <asm/cpregs.h>
 #include <asm/page.h>
 #include <asm/gic.h>
+#include <asm/flushtlb.h>
 
 void flush_tlb_mask(const cpumask_t *mask)
 {
     /* No need to IPI other processors on ARM, the processor takes care of it. */
-    flush_xen_data_tlb();
+    flush_tlb_all();
 }
 
 void smp_send_event_check_mask(const cpumask_t *mask)
index ab166f39a55da91f87a9531069aba419a8f24a48..7183a073f049b0af7566ec5114c87ea68812bf70 100644 (file)
@@ -34,6 +34,17 @@ static inline void flush_tlb_all_local(void)
     isb();
 }
 
+/* Flush innershareable TLBs, all VMIDs, non-hypervisor mode */
+static inline void flush_tlb_all(void)
+{
+    dsb();
+
+    WRITE_CP32((uint32_t) 0, TLBIALLNSNHIS);
+
+    dsb();
+    isb();
+}
+
 #endif /* __ASM_ARM_ARM32_FLUSHTLB_H__ */
 /*
  * Local variables:
index 9ce79a86c37832da98316dd9f07a0883a64d6adc..a73df922f98f74cb9d5cbe4fd2a781d39bd842e2 100644 (file)
@@ -34,6 +34,17 @@ static inline void flush_tlb_all_local(void)
         : : : "memory");
 }
 
+/* Flush innershareable TLBs, all VMIDs, non-hypervisor mode */
+static inline void flush_tlb_all(void)
+{
+    asm volatile(
+        "dsb sy;"
+        "tlbi alle1is;"
+        "dsb sy;"
+        "isb;"
+        : : : "memory");
+}
+
 #endif /* __ASM_ARM_ARM64_FLUSHTLB_H__ */
 /*
  * Local variables: