nEPT: Sync PDPTR fields if L2 guest in PAE paging mode

For PAE L2 guest, GUEST_DPPTR registers needs to be synced for each virtual
vmentry.

Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com>
Acked-by: Tim Deegan <tim@xen.org>
Acked-by: Jun Nakajima <jun.nakajima@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Committed-by: Jan Beulich <jbeulich@suse.com>

diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c
index 17697a8abe67b6a4e967c31dc267bd001ea90bf4..fdf4f65e2c3bb02ad2327ecc93b65e80478747d3 100644 (file)
--- a/xen/arch/x86/hvm/vmx/vvmx.c
+++ b/xen/arch/x86/hvm/vmx/vvmx.c
@@ -882,7 +882,15 @@ static void load_shadow_guest_state(struct vcpu *v)
                      (__get_vvmcs(vvmcs, CR4_READ_SHADOW) & cr_gh_mask);
     __vmwrite(CR4_READ_SHADOW, cr_read_shadow);
 
-    /* TODO: PDPTRs for nested ept */
+    if ( nvmx_ept_enabled(v) && hvm_pae_enabled(v) &&
+         (v->arch.hvm_vcpu.guest_efer & EFER_LMA) )
+    {
+        vvmcs_to_shadow(vvmcs, GUEST_PDPTR0);
+        vvmcs_to_shadow(vvmcs, GUEST_PDPTR1);
+        vvmcs_to_shadow(vvmcs, GUEST_PDPTR2);
+        vvmcs_to_shadow(vvmcs, GUEST_PDPTR3);
+    }
+
     /* TODO: CR3 target control */
 }