#define IOMMU_CMD_DEVICE_ID_MASK 0x0000FFFF
#define IOMMU_CMD_DEVICE_ID_SHIFT 0
-#define IOMMU_CMD_ADDR_LOW_MASK 0xFFFFF000
-#define IOMMU_CMD_ADDR_LOW_SHIFT 12
-#define IOMMU_CMD_ADDR_HIGH_MASK 0xFFFFFFFF
-#define IOMMU_CMD_ADDR_HIGH_SHIFT 0
-
#define IOMMU_REG_BASE_ADDR_LOW_MASK 0xFFFFF000
#define IOMMU_REG_BASE_ADDR_LOW_SHIFT 12
#define IOMMU_REG_BASE_ADDR_HIGH_MASK 0x000FFFFF
IOMMU_CMD_DEVICE_ID_SHIFT, cmd);
}
-/* access address field from iommu cmd */
-static inline uint32_t iommu_get_addr_lo_from_cmd(uint32_t cmd)
-{
- return get_field_from_reg_u32(cmd, IOMMU_CMD_ADDR_LOW_MASK,
- IOMMU_CMD_ADDR_LOW_SHIFT);
-}
-
-static inline uint32_t iommu_get_addr_hi_from_cmd(uint32_t cmd)
-{
- return get_field_from_reg_u32(cmd, IOMMU_CMD_ADDR_LOW_MASK,
- IOMMU_CMD_ADDR_HIGH_SHIFT);
-}
-
/* access iommu base addresses field from mmio regs */
static inline void iommu_set_addr_lo_to_reg(uint32_t *reg, uint32_t addr)
{