xen/arm: livepatch: Prevent CPUs to fetch stale instructions after livepatching

During livepatch, a single CPU will take care of applying the patch and
all the others will wait for the action to complete. They will then once
execute arch_livepatch_post_action() to flush the pipeline.

Per B2.2.5 "Concurrent modification and execution of instructions" in
DDI 0487E.a, flushing the instruction cache is not enough to ensure new
instructions are seen. All the PEs should also do an isb() to
synchronize the fetched instruction stream.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Acked-by: Ross Lagerwall <ross.lagerwall@citrix.com>
Reviewed-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>

diff --git a/xen/arch/arm/livepatch.c b/xen/arch/arm/livepatch.c
index 279d52cc6cd78125f57a007d6a711a48419a25a3..00c5e2bc45af5881265fed5645bdd1c48663afce 100644 (file)
--- a/xen/arch/arm/livepatch.c
+++ b/xen/arch/arm/livepatch.c
@@ -88,7 +88,8 @@ void arch_livepatch_revert(const struct livepatch_func *func)
 
 void arch_livepatch_post_action(void)
 {
-    /* arch_livepatch_revive has nuked the instruction cache. */
+    /* Discard any stale instructions that may have been fetched. */
+    isb();
 }
 
 void arch_livepatch_mask(void)