}
void
-aw_wdog_watchdog_reset()
+aw_wdog_watchdog_reset(void)
{
if (aw_wdog_sc == NULL) {
};
void
-aml8726_identify_soc()
+aml8726_identify_soc(void)
{
int err;
struct resource res;
#endif
static void
-aml8726_fixup_busfreq()
+aml8726_fixup_busfreq(void)
{
phandle_t node;
pcell_t freq, prop;
0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
void
-cpu_reset()
+cpu_reset(void)
{
/* Watchdog has not yet been initialized */
static int arm_dcache_l2_linesize;
static void
-get_cachetype_cp15()
+get_cachetype_cp15(void)
{
u_int ctype, isize, dsize, cpuid;
u_int clevel, csize, i, sel;
*/
int
-set_cpufuncs()
+set_cpufuncs(void)
{
cputype = cpu_ident();
cputype &= CPU_ID_CPU_MASK;
}
void
-db_md_list_watchpoints()
+db_md_list_watchpoints(void)
{
dbg_show_watchpoint();
* Print the contents of the static mapping table. Used for bootverbose.
*/
void
-arm_physmem_print_tables()
+arm_physmem_print_tables(void)
{
physmem_dump_tables(printf);
static struct undefined_handler gdb_uh;
void
-undefined_init()
+undefined_init(void)
{
int loop;
}
void
-bcmwd_watchdog_reset()
+bcmwd_watchdog_reset(void)
{
if (bcmwd_lsc == NULL)
}
uint32_t
-imx6_get_cpu_clock()
+imx6_get_cpu_clock(void)
{
uint32_t corediv, plldiv;
}
int
-src_reset_ipu()
+src_reset_ipu(void)
{
uint32_t reg;
int timeout = 10000;
}
void
-lpc_gpio_init()
+lpc_gpio_init(void)
{
bus_space_tag_t bst;
bus_space_handle_t bsh;
static void
-tegra_efuse_dump_sku()
+tegra_efuse_dump_sku(void)
{
printf(" TEGRA SKU Info:\n");
printf(" chip_id: %u\n", tegra_sku_info.chip_id);
}
void
-rk30_wd_watchdog_reset()
+rk30_wd_watchdog_reset(void)
{
bus_space_handle_t bsh;
* fails that IS an error, return -1.
*/
static int
-dmtpps_find_tmr_num_by_tunable()
+dmtpps_find_tmr_num_by_tunable(void)
{
struct padinfo *pi;
char iname[20];
* input pin. If so, return the timer number, if not return 0.
*/
static int
-dmtpps_find_tmr_num_by_padconf()
+dmtpps_find_tmr_num_by_padconf(void)
{
int err;
unsigned int padstate;
* configuration. This is done just once, the first time probe() runs.
*/
static int
-dmtpps_find_tmr_num()
+dmtpps_find_tmr_num(void)
{
int tmr_num;
}
void
-cpu_reset()
+cpu_reset(void)
{
printf("cpu_reset\n");
while (1);
}
void
-cpu_reset()
+cpu_reset(void)
{
if (zynq7_cpu_reset != NULL)
(*zynq7_cpu_reset)();
}
int
-zy7_pl_level_shifters_enabled()
+zy7_pl_level_shifters_enabled(void)
{
struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
}
void
-zy7_pl_level_shifters_enable()
+zy7_pl_level_shifters_enable(void)
{
struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
}
void
-zy7_pl_level_shifters_disable()
+zy7_pl_level_shifters_disable(void)
{
struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
}
int
-pxa_gpio_get_next_irq()
+pxa_gpio_get_next_irq(void)
{
struct pxa_gpio_softc *sc;
int gpio;
}
uint32_t
-pxa_icu_get_icip()
+pxa_icu_get_icip(void)
{
return (bus_space_read_4(pxa_icu_softc->pi_bst,
}
uint32_t
-pxa_icu_get_icfp()
+pxa_icu_get_icfp(void)
{
return (bus_space_read_4(pxa_icu_softc->pi_bst,
}
uint32_t
-pxa_icu_get_icmr()
+pxa_icu_get_icmr(void)
{
return (bus_space_read_4(pxa_icu_softc->pi_bst,
}
uint32_t
-pxa_icu_get_iclr()
+pxa_icu_get_iclr(void)
{
return (bus_space_read_4(pxa_icu_softc->pi_bst,
}
uint32_t
-pxa_icu_get_icpr()
+pxa_icu_get_icpr(void)
{
return (bus_space_read_4(pxa_icu_softc->pi_bst,
}
void
-pxa_icu_idle_enable()
+pxa_icu_idle_enable(void)
{
bus_space_write_4(pxa_icu_softc->pi_bst,
}
void
-pxa_icu_idle_disable()
+pxa_icu_idle_disable(void)
{
bus_space_write_4(pxa_icu_softc->pi_bst,
bus_space_tag_t obio_tag = NULL;
void
-pxa_obio_tag_init()
+pxa_obio_tag_init(void)
{
bcopy(&_base_tag, &_obio_tag, sizeof(struct bus_space));
}
uint32_t
-pxa_timer_get_oscr()
+pxa_timer_get_oscr(void)
{
return (bus_space_read_4(timer_softc->pt_bst,
}
uint32_t
-pxa_timer_get_ossr()
+pxa_timer_get_ossr(void)
{
return (bus_space_read_4(timer_softc->pt_bst,
}
void
-pxa_timer_watchdog_enable()
+pxa_timer_watchdog_enable(void)
{
bus_space_write_4(timer_softc->pt_bst,
}
void
-pxa_timer_watchdog_disable()
+pxa_timer_watchdog_disable(void)
{
bus_space_write_4(timer_softc->pt_bst,