OvmfPkg/PlatformInitLib: move mmconfig to 0xe0000000

Also swap the ordering of 32bit PCI MMIO window on q35, i.e. use the
room between end of low memory and the start of the mmconfig bar.

With a typical configuration on modern qemu with gigabyte-aligned memory
the MMIO window start at 0x8000000, sized 1532 MB.  In case there is
memory present above 0x80000000 the window will start at 0xc0000000
instead, with 512 MB size.

This depends on qemu commit 4a4418369d6d ("q35: fix mmconfig and
PCI0._CRS"), so it raises the bar for the lowest supported version
to qemu 4.1 (released Aug 2019).

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Anthony PERARD <anthony.perard@citrix.com>

diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc
index 654c3af0928be150e74885a5f8ce8c66ea4f28eb..c005e474dd8267593060474ad656eed1e1429fd1 100644 (file)
--- a/OvmfPkg/AmdSev/AmdSevX64.dsc
+++ b/OvmfPkg/AmdSev/AmdSevX64.dsc
@@ -443,7 +443,7 @@
   #\r
   # On Q35 machine types that QEMU intends to support in the long term, QEMU\r
   # never lets the RAM below 4 GB exceed 2816 MB.\r
-  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000\r
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000\r
 \r
 !if $(SOURCE_DEBUG_ENABLE) == TRUE\r
   gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2\r

diff --git a/OvmfPkg/IntelTdx/IntelTdxX64.dsc b/OvmfPkg/IntelTdx/IntelTdxX64.dsc
index e6d85286e0021fa8eb123b0d4aed2f474815618e..5c56858d063b96bfaab232fed72e60debe8b8fae 100644 (file)
--- a/OvmfPkg/IntelTdx/IntelTdxX64.dsc
+++ b/OvmfPkg/IntelTdx/IntelTdxX64.dsc
@@ -448,7 +448,7 @@
   #\r
   # On Q35 machine types that QEMU intends to support in the long term, QEMU\r
   # never lets the RAM below 4 GB exceed 2816 MB.\r
-  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000\r
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000\r
 \r
   #\r
   # The NumberOfPages values below are ad-hoc. They are updated sporadically at\r

diff --git a/OvmfPkg/Library/PlatformInitLib/Platform.c b/OvmfPkg/Library/PlatformInitLib/Platform.c
index 678e8e329023b753a2e317485fdb8d91e554effb..5cf8af825a2f6e66990e907c4d61578037e4a422 100644 (file)
--- a/OvmfPkg/Library/PlatformInitLib/Platform.c
+++ b/OvmfPkg/Library/PlatformInitLib/Platform.c
@@ -156,8 +156,8 @@ PlatformMemMapInitialization (
   // address       purpose   size\r
   // ------------  --------  -------------------------\r
   // max(top, 2g)  PCI MMIO  0xFC000000 - max(top, 2g)  (pc)\r
-  // 0xB0000000    MMCONFIG                     256 MB  (q35)\r
-  // 0xC0000000    PCI MMIO                     960 MB  (q35)\r
+  // max(top, 2g)  PCI MMIO  0xE0000000 - max(top, 2g)  (q35)\r
+  // 0xE0000000    MMCONFIG                     256 MB  (q35)\r
   // 0xFC000000    gap                           44 MB\r
   // 0xFEC00000    IO-APIC                        4 KB\r
   // 0xFEC01000    gap                         1020 KB\r
@@ -168,6 +168,7 @@ PlatformMemMapInitialization (
   // 0xFEE00000    LAPIC                          1 MB\r
   //\r
   PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
+  PciBase      = PlatformInfoHob->Uc32Base;\r
   PciExBarBase = 0;\r
   if (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {\r
     //\r
@@ -177,13 +178,12 @@ PlatformMemMapInitialization (
     PciExBarBase = PcdGet64 (PcdPciExpressBaseAddress);\r
     ASSERT (PlatformInfoHob->LowMemory <= PciExBarBase);\r
     ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB);\r
-    PciBase = (UINT32)(PciExBarBase + SIZE_256MB);\r
+    PciSize = (UINT32)(PciExBarBase - PciBase);\r
   } else {\r
     ASSERT (PlatformInfoHob->LowMemory <= PlatformInfoHob->Uc32Base);\r
-    PciBase = PlatformInfoHob->Uc32Base;\r
+    PciSize = 0xFC000000 - PciBase;\r
   }\r
 \r
-  PciSize = 0xFC000000 - PciBase;\r
   PlatformAddIoMemoryBaseSizeHob (PciBase, PciSize);\r
 \r
   PlatformInfoHob->PcdPciMmio32Base = PciBase;\r

diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index 9e4705f29b4668fc01625ac59650e7150871f187..a6db902f54ece86f5fcfd8824628fe959bf57da3 100644 (file)
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -559,7 +559,7 @@
   #\r
   # On Q35 machine types that QEMU intends to support in the long term, QEMU\r
   # never lets the RAM below 4 GB exceed 2816 MB.\r
-  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000\r
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000\r
 \r
 !if $(SOURCE_DEBUG_ENABLE) == TRUE\r
   gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2\r

diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index 86940e9af54c1340722270fb69a89defbd484c30..076fc0353de02aaa2610cb983aa50b6f1af4cc98 100644 (file)
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -565,7 +565,7 @@
   #\r
   # On Q35 machine types that QEMU intends to support in the long term, QEMU\r
   # never lets the RAM below 4 GB exceed 2816 MB.\r
-  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000\r
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000\r
 \r
 !if $(SOURCE_DEBUG_ENABLE) == TRUE\r
   gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2\r

diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 00f7005fca402be13b9a4f07734f84a7efc0fc0c..4a276e1ec0d9d73b4d49ad386bd875718871d809 100644 (file)
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -586,7 +586,7 @@
   #\r
   # On Q35 machine types that QEMU intends to support in the long term, QEMU\r
   # never lets the RAM below 4 GB exceed 2816 MB.\r
-  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000\r
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000\r
 \r
 !if $(SOURCE_DEBUG_ENABLE) == TRUE\r
   gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2\r