]> xenbits.xensource.com Git - people/aperard/qemu-dm.git/commitdiff
target/tricore: Fix helper_ret() not correctly restoring PSW
authorBastian Koppelmann <kbastian@mail.uni-paderborn.de>
Mon, 12 Jun 2023 11:32:45 +0000 (13:32 +0200)
committerBastian Koppelmann <kbastian@mail.uni-paderborn.de>
Wed, 21 Jun 2023 16:09:54 +0000 (18:09 +0200)
We are always taking the TRICORE_FEATURE_13 branch as every CPU has TRICORE_FEATURE_13.
For CPUs with ISA > 1.3 we have to take the else branch.

We fix this by inverting the condition. We check for
TRICORE_FEATURE_131, which every CPU except TRICORE_FEATURE_13 CPUs
have.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1700
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <20230612113245.56667-5-kbastian@mail.uni-paderborn.de>

target/tricore/op_helper.c

index 9a7a26b171c2dba157b881a3d8c8c395eb7489f1..821a4b67cb6dbb4f5f51886fb4ca890ff94bc0e2 100644 (file)
@@ -2584,12 +2584,12 @@ void helper_ret(CPUTriCoreState *env)
     /* PCXI = new_PCXI; */
     env->PCXI = new_PCXI;
 
-    if (tricore_feature(env, TRICORE_FEATURE_13)) {
-        /* PSW = new_PSW */
-        psw_write(env, new_PSW);
-    } else {
+    if (tricore_feature(env, TRICORE_FEATURE_131)) {
         /* PSW = {new_PSW[31:26], PSW[25:24], new_PSW[23:0]}; */
         psw_write(env, (new_PSW & ~(0x3000000)) + (psw & (0x3000000)));
+    } else { /* TRICORE_FEATURE_13 only */
+        /* PSW = new_PSW */
+        psw_write(env, new_PSW);
     }
 }