allow $1 $2:shadow enable;
allow $1 $2:mmu { map_read map_write adjust memorymap physmap pinpage mmuext_op updatemp };
allow $1 $2:grant setup;
- allow $1 $2:hvm { cacheattr getparam hvmctl sethvmc
+ allow $1 $2:hvm { getparam hvmctl sethvmc
setparam nested altp2mhvm altp2mhvm_op dm };
')
allow $1 $2_target:domain { getdomaininfo shutdown };
allow $1 $2_target:mmu { map_read map_write adjust physmap target_hack };
- allow $1 $2_target:hvm { getparam setparam hvmctl cacheattr dm };
+ allow $1 $2_target:hvm { getparam setparam hvmctl dm };
')
# make_device_model(priv, dm_dom, hvm_dom)
* @parm domid the domain id to be serviced
* @parm start Start gfn
* @parm end End gfn
- * @parm type XEN_DOMCTL_MEM_CACHEATTR_*
+ * @parm type XEN_DMOP_MEM_CACHEATTR_*
* @return 0 on success, -1 on failure.
*/
int xendevicemodel_pin_memory_cacheattr(
unsigned long nr_mfns,
uint8_t allow_access);
-int xc_domain_pin_memory_cacheattr(xc_interface *xch,
- uint32_t domid,
- uint64_t start,
- uint64_t end,
- uint32_t type);
-
unsigned long xc_make_page_below_4G(xc_interface *xch, uint32_t domid,
unsigned long mfn);
int xc_hvm_inject_trap(
xc_interface *xch, uint32_t domid, int vcpu, uint8_t vector,
uint8_t type, uint32_t error_code, uint8_t insn_len, uint64_t cr2);
+int xc_domain_pin_memory_cacheattr(
+ xc_interface *xch, uint32_t domid, uint64_t start, uint64_t end,
+ uint32_t type);
#endif /* XC_WANT_COMPAT_DEVICEMODEL_API */
type, error_code, insn_len, cr2);
}
+int xc_domain_pin_memory_cacheattr(
+ xc_interface *xch, uint32_t domid, uint64_t start, uint64_t end,
+ uint32_t type)
+{
+ return xendevicemodel_pin_memory_cacheattr(xch->dmod, domid, start, end,
+ type);
+}
+
/*
* Local variables:
* mode: C
return do_domctl(xch, &domctl);
}
-int xc_domain_pin_memory_cacheattr(xc_interface *xch,
- uint32_t domid,
- uint64_t start,
- uint64_t end,
- uint32_t type)
-{
- DECLARE_DOMCTL;
- domctl.cmd = XEN_DOMCTL_pin_mem_cacheattr;
- domctl.domain = domid;
- domctl.u.pin_mem_cacheattr.start = start;
- domctl.u.pin_mem_cacheattr.end = end;
- domctl.u.pin_mem_cacheattr.type = type;
- return do_domctl(xch, &domctl);
-}
-
#if defined(__i386__) || defined(__x86_64__)
int xc_domain_set_memory_map(xc_interface *xch,
uint32_t domid,
#include <asm/irq.h>
#include <asm/hvm/hvm.h>
#include <asm/hvm/support.h>
-#include <asm/hvm/cacheattr.h>
#include <asm/processor.h>
#include <asm/acpi.h> /* for hvm_acpi_power_button */
#include <xen/hypercall.h> /* for arch_do_domctl */
break;
}
- case XEN_DOMCTL_pin_mem_cacheattr:
- ret = hvm_set_mem_pinned_cacheattr(
- d, domctl->u.pin_mem_cacheattr.start,
- domctl->u.pin_mem_cacheattr.end,
- domctl->u.pin_mem_cacheattr.type);
- break;
-
case XEN_DOMCTL_set_ext_vcpucontext:
case XEN_DOMCTL_get_ext_vcpucontext:
{
#include "hvm/save.h"
#include "memory.h"
-#define XEN_DOMCTL_INTERFACE_VERSION 0x0000000f
+#define XEN_DOMCTL_INTERFACE_VERSION 0x00000010
/*
* NB. xen_domctl.domain is an IN/OUT parameter for this operation.
#define XEN_DOMCTL_MEM_CACHEATTR_WB 6
#define XEN_DOMCTL_MEM_CACHEATTR_UCM 7
#define XEN_DOMCTL_DELETE_MEM_CACHEATTR (~(uint32_t)0)
-struct xen_domctl_pin_mem_cacheattr {
- uint64_aligned_t start, end;
- uint32_t type; /* XEN_DOMCTL_MEM_CACHEATTR_* */
-};
/* XEN_DOMCTL_set_ext_vcpucontext */
#define XEN_DOMCTL_bind_pt_irq 38
#define XEN_DOMCTL_memory_mapping 39
#define XEN_DOMCTL_ioport_mapping 40
-#define XEN_DOMCTL_pin_mem_cacheattr 41
+/* #define XEN_DOMCTL_pin_mem_cacheattr 41 Removed - use dmop */
#define XEN_DOMCTL_set_ext_vcpucontext 42
#define XEN_DOMCTL_get_ext_vcpucontext 43
#define XEN_DOMCTL_set_opt_feature 44 /* Obsolete IA64 only */
struct xen_domctl_bind_pt_irq bind_pt_irq;
struct xen_domctl_memory_mapping memory_mapping;
struct xen_domctl_ioport_mapping ioport_mapping;
- struct xen_domctl_pin_mem_cacheattr pin_mem_cacheattr;
struct xen_domctl_ext_vcpucontext ext_vcpucontext;
struct xen_domctl_set_target set_target;
struct xen_domctl_subscribe subscribe;
struct xen_dm_op_pin_memory_cacheattr {
uint64_aligned_t start; /* Start gfn. */
uint64_aligned_t end; /* End gfn. */
- uint32_t type; /* XEN_DOMCTL_MEM_CACHEATTR_* */
+/* Caching types: these happen to be the same as x86 MTRR/PAT type codes. */
+#define XEN_DMOP_MEM_CACHEATTR_UC 0
+#define XEN_DMOP_MEM_CACHEATTR_WC 1
+#define XEN_DMOP_MEM_CACHEATTR_WT 4
+#define XEN_DMOP_MEM_CACHEATTR_WP 5
+#define XEN_DMOP_MEM_CACHEATTR_WB 6
+#define XEN_DMOP_MEM_CACHEATTR_UCM 7
+#define XEN_DMOP_DELETE_MEM_CACHEATTR (~(uint32_t)0)
+ uint32_t type; /* XEN_DMOP_MEM_CACHEATTR_* */
uint32_t pad;
};
case XEN_DOMCTL_mem_sharing_op:
return current_has_perm(d, SECCLASS_HVM, HVM__MEM_SHARING);
- case XEN_DOMCTL_pin_mem_cacheattr:
- return current_has_perm(d, SECCLASS_HVM, HVM__CACHEATTR);
-
case XEN_DOMCTL_sendtrigger:
return current_has_perm(d, SECCLASS_DOMAIN, DOMAIN__TRIGGER);
# HVMOP_get_param
getparam
bind_irq
-# XEN_DOMCTL_pin_mem_cacheattr
- cacheattr
# HVMOP_get_mem_type,
# HVMOP_set_mem_access, HVMOP_get_mem_access, HVMOP_pagetable_dying
hvmctl