bool_t lock_prefix = 0;
int override_seg = -1, rc = X86EMUL_OKAY;
struct operand src, dst;
+ enum x86_swint_type swint_type;
DECLARE_ALIGNED(mmval_t, mmval);
/*
* Data operand effective address (usually computed from ModRM).
case 0xcc: /* int3 */
src.val = EXC_BP;
+ swint_type = x86_swint_int3;
goto swint;
case 0xcd: /* int imm8 */
src.val = insn_fetch_type(uint8_t);
+ swint_type = x86_swint_int;
swint:
fail_if(!in_realmode(ctxt, ops)); /* XSA-106 */
fail_if(ops->inject_sw_interrupt == NULL);
- rc = ops->inject_sw_interrupt(src.val, _regs.eip - ctxt->regs->eip,
+ rc = ops->inject_sw_interrupt(swint_type, src.val,
+ _regs.eip - ctxt->regs->eip,
ctxt) ? : X86EMUL_EXCEPTION;
goto done;
if ( !(_regs.eflags & EFLG_OF) )
break;
src.val = EXC_OF;
+ swint_type = x86_swint_into;
goto swint;
case 0xcf: /* iret */ {
case 0xf1: /* int1 (icebp) */
src.val = EXC_DB;
+ swint_type = x86_swint_icebp;
goto swint;
case 0xf4: /* hlt */
#define is_x86_user_segment(seg) ((unsigned)(seg) <= x86_seg_gs)
+/* Classification of the types of software generated interrupts/exceptions. */
+enum x86_swint_type {
+ x86_swint_icebp, /* 0xf1 */
+ x86_swint_int3, /* 0xcc */
+ x86_swint_into, /* 0xce */
+ x86_swint_int, /* 0xcd $n */
+};
+
/*
* Attribute for segment selector. This is a copy of bit 40:47 & 52:55 of the
* segment descriptor. It happens to match the format of an AMD SVM VMCB.
/* inject_sw_interrupt */
int (*inject_sw_interrupt)(
+ enum x86_swint_type type,
uint8_t vector,
uint8_t insn_len,
struct x86_emulate_ctxt *ctxt);