Just like for LAPIC, IO-APIC, MSI, and HT we shouldn't be granting Dom0
access to these. This implicitly results in these pages also getting
marked reserved in the machine memory map Dom0 uses to determine the
ranges where PCI devices can have their MMIO ranges placed.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
master commit:
fdf30377fbc4fa6798bfda7d69e5d448c2b8e834
master date: 2014-10-06 11:15:01 +0200
*/
#include <xen/sched.h>
+#include <xen/iocap.h>
#include <xen/pci.h>
#include <xen/pci_regs.h>
#include <xen/paging.h>
static void __init amd_iommu_dom0_init(struct domain *d)
{
unsigned long i;
+ const struct amd_iommu *iommu;
if ( !iommu_passthrough && !need_iommu(d) )
{
}
}
+ for_each_amd_iommu ( iommu )
+ if ( iomem_deny_access(d, PFN_DOWN(iommu->mmio_base_phys),
+ PFN_DOWN(iommu->mmio_base_phys +
+ IOMMU_MMIO_REGION_LENGTH - 1)) )
+ BUG();
+
setup_dom0_pci_devices(d, amd_iommu_setup_dom0_device);
}
#include <xen/sched.h>
#include <xen/xmalloc.h>
#include <xen/domain_page.h>
+#include <xen/iocap.h>
#include <xen/iommu.h>
#include <asm/hvm/iommu.h>
#include <xen/numa.h>
for_each_drhd_unit ( drhd )
{
+ if ( iomem_deny_access(d, PFN_DOWN(drhd->address),
+ PFN_DOWN(drhd->address)) )
+ BUG();
iommu_enable_translation(drhd);
}
}