* after us can get the correct flags.
*/
extern unsigned long mmu_cr4_features;
+extern unsigned long cr4_pv32_mask;
static always_inline void set_in_cr4 (unsigned long mask)
{
mmu_cr4_features |= mask;
write_cr4(read_cr4() | mask);
+
+ if ( IS_ENABLED(CONFIG_PV32) && (mask & XEN_CR4_PV32_BITS) )
+ cr4_pv32_mask |= (mask & XEN_CR4_PV32_BITS);
}
static always_inline void __monitor(const void *eax, unsigned long ecx,
extern bool opt_dom0_cpuid_faulting;
extern bool opt_dom0_msr_relaxed;
-extern unsigned long cr4_pv32_mask;
-
#define max_init_domid (0)
#endif
/*
* Clear SMAP in CR4 to allow user-accesses in construct_dom0(). This
- * prevents us needing to write rewrite construct_dom0() in terms of
+ * prevents us needing to write construct_dom0() in terms of
* copy_{to,from}_user().
*/
if ( boot_cpu_has(X86_FEATURE_XEN_SMAP) )
{
- cr4_pv32_mask &= ~X86_CR4_SMAP;
+ if ( IS_ENABLED(CONFIG_PV32) )
+ cr4_pv32_mask &= ~X86_CR4_SMAP;
+
write_cr4(read_cr4() & ~X86_CR4_SMAP);
}
if ( boot_cpu_has(X86_FEATURE_XEN_SMAP) )
{
write_cr4(read_cr4() | X86_CR4_SMAP);
- cr4_pv32_mask |= X86_CR4_SMAP;
+
+ if ( IS_ENABLED(CONFIG_PV32) )
+ cr4_pv32_mask |= X86_CR4_SMAP;
}
return rc;
#ifdef CONFIG_PV32
int8_t __read_mostly opt_pv32 = -1;
+unsigned long __ro_after_init cr4_pv32_mask;
#endif
static int __init cf_check parse_pv(const char *s)
int8_t __initdata opt_probe_port_aliases = -1;
boolean_param("probe-port-aliases", opt_probe_port_aliases);
-unsigned long __ro_after_init cr4_pv32_mask;
-
/* **** Linux config option: propagated to domain0. */
/* "acpi=off": Sisables both ACPI table parsing and interpreter. */
/* "acpi=force": Override the disable blacklist. */
if ( boot_cpu_has(X86_FEATURE_XEN_SMAP) )
set_in_cr4(X86_CR4_SMAP);
- cr4_pv32_mask = mmu_cr4_features & XEN_CR4_PV32_BITS;
-
if ( boot_cpu_has(X86_FEATURE_FSGSBASE) )
set_in_cr4(X86_CR4_FSGSBASE);