* is just due to period adjustment.
*/
static void
-periodic_timer_update(RTCState *s, int64_t current_time, uint32_t old_period)
+periodic_timer_update(RTCState *s, int64_t current_time, uint32_t old_period, bool period_change)
{
uint32_t period;
int64_t cur_clock, next_irq_clock, lost_clock = 0;
period = rtc_periodic_clock_ticks(s);
+ s->period = period;
+
if (!period) {
s->irq_coalesced = 0;
timer_del(s->periodic_timer);
* if the periodic timer's update is due to period re-configuration,
* we should count the clock since last interrupt.
*/
- if (old_period) {
+ if (old_period && period_change) {
int64_t last_periodic_clock, next_periodic_clock;
next_periodic_clock = muldiv64(s->next_periodic_time,
if (s->lost_tick_policy == LOST_TICK_POLICY_SLEW) {
uint32_t old_irq_coalesced = s->irq_coalesced;
- s->period = period;
lost_clock += old_irq_coalesced * old_period;
s->irq_coalesced = lost_clock / s->period;
lost_clock %= s->period;
{
RTCState *s = opaque;
- periodic_timer_update(s, s->next_periodic_time, 0);
+ periodic_timer_update(s, s->next_periodic_time, s->period, false);
s->cmos_data[RTC_REG_C] |= REG_C_PF;
if (s->cmos_data[RTC_REG_B] & REG_B_PIE) {
s->cmos_data[RTC_REG_C] |= REG_C_IRQF;
if (update_periodic_timer) {
periodic_timer_update(s, qemu_clock_get_ns(rtc_clock),
- old_period);
+ old_period, true);
}
check_update_timer(s);
if (update_periodic_timer) {
periodic_timer_update(s, qemu_clock_get_ns(rtc_clock),
- old_period);
+ old_period, true);
}
check_update_timer(s);
s->offset = 0;
check_update_timer(s);
}
+ s->period = rtc_periodic_clock_ticks(s);
/* The periodic timer is deterministic in record/replay mode,
* so there is no need to update it after loading the vmstate.
uint64_t now = qemu_clock_get_ns(rtc_clock);
if (now < s->next_periodic_time ||
now > (s->next_periodic_time + get_max_clock_jump())) {
- periodic_timer_update(s, qemu_clock_get_ns(rtc_clock), 0);
+ periodic_timer_update(s, qemu_clock_get_ns(rtc_clock), s->period, false);
}
}