#define RK3328_GRF_MACPHY_CON3 0x0B0C
#define RK3328_GRF_MACPHY_STATUS 0x0B10
+static struct ofw_compat_data compat_data[] = {
+ {"rockchip,rk3288-gmac", 1},
+ {"rockchip,rk3328-gmac", 1},
+ {"rockchip,rk3399-gmac", 1},
+ {NULL, 0}
+};
+
#ifdef notyet
static void
rk3328_set_delays(struct syscon *grf, phandle_t node)
if (!ofw_bus_status_okay(dev))
return (ENXIO);
- if (!(ofw_bus_is_compatible(dev, "rockchip,rk3328-gmac") ||
- ofw_bus_is_compatible(dev, "rockchip,rk3399-gmac")))
+ if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
return (ENXIO);
device_set_desc(dev, "Rockchip Gigabit Ethernet Controller");
#include <dev/ofw/ofw_bus_subr.h>
#include <dev/extres/clk/clk.h>
-#include "opt_soc.h"
-
#include "gpio_if.h"
#define RK_GPIO_SWPORTA_DR 0x00 /* Data register */
{
/* Each bank have always 32 pins */
+ /* XXX not true*/
*maxpin = 32;
return (0);
}
sc = device_get_softc(dev);
+ /* XXX Combine this with parent (pinctrl) */
RK_GPIO_LOCK(sc);
reg = RK_GPIO_READ(sc, RK_GPIO_SWPORTA_DDR);
RK_GPIO_UNLOCK(sc);
{
/* Caps are managed by the pinctrl device */
+ /* XXX Pass this to parent (pinctrl) */
*caps = 0;
return (0);
}
sc = device_get_softc(dev);
+ /* XXX Combine this with parent (pinctrl) */
RK_GPIO_LOCK(sc);
reg = RK_GPIO_READ(sc, RK_GPIO_SWPORTA_DDR);
return (0);
}
+static phandle_t
+rk_gpio_get_node(device_t bus, device_t dev)
+{
+
+ /* We only have one child, the GPIO bus, which needs our own node. */
+ return (ofw_bus_get_node(bus));
+}
+
static device_method_t rk_gpio_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, rk_gpio_probe),
DEVMETHOD(gpio_pin_config_32, rk_gpio_pin_config_32),
DEVMETHOD(gpio_map_gpios, rk_gpio_map_gpios),
+ /* ofw_bus interface */
+ DEVMETHOD(ofw_bus_get_node, rk_gpio_get_node),
+
DEVMETHOD_END
};
static devclass_t rk_gpio_devclass;
+/*
+ * GPIO driver is always a child of rk_pinctrl driver and should be probed
+ * and attached within rk_pinctrl_attach function. Due to this, bus pass order
+ * must be same as bus pass order of rk_pinctrl driver.
+ */
EARLY_DRIVER_MODULE(rk_gpio, simplebus, rk_gpio_driver,
- rk_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
+ rk_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
#include <dev/extres/syscon/syscon.h>
#include <dev/fdt/simple_mfd.h>
-#include "opt_soc.h"
-
static struct ofw_compat_data compat_data[] = {
-#ifdef SOC_ROCKCHIP_RK3328
+ {"rockchip,rk3288-grf", 1},
{"rockchip,rk3328-grf", 1},
-#endif
-#ifdef SOC_ROCKCHIP_RK3399
{"rockchip,rk3399-grf", 1},
{"rockchip,rk3399-pmugrf", 1},
-#endif
{NULL, 0}
};