x86, shadow: propagate pat caching on the shadow l1

PAT caching was only propagated if has_arch_pdevs(),
causing the hvm_get_mem_pinned_cacheattr() to be ignored
in the non passthrough case.
l1_disallow_mask() needs to be relaxed.

Signed-off-by: Jean Guyader <jean.guyader@citrix.com>

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index bc1134fd90d99f5081e0b4fae2639d6495a91c90..8002c3d67f5f24da130b2add2b50c88455612f06 100644 (file)
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -158,7 +158,8 @@ boolean_param("allowhugepage", opt_allow_hugepage);
     ((d != dom_io) &&                                           \
      (rangeset_is_empty((d)->iomem_caps) &&                     \
       rangeset_is_empty((d)->arch.ioport_caps) &&               \
-      !has_arch_pdevs(d)) ?                                     \
+      !has_arch_pdevs(d) &&                                     \
+      !is_hvm_domain(d)) ?                                      \
      L1_DISALLOW_MASK : (L1_DISALLOW_MASK & ~PAGE_CACHE_ATTRS))
 
 #ifdef __x86_64__

diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.c
index d647dc5b26c2f892ab157b330c3cf3d418e4693d..349a79cb3ae5408a726a3433aae090b896f68061 100644 (file)
--- a/xen/arch/x86/mm/shadow/multi.c
+++ b/xen/arch/x86/mm/shadow/multi.c
@@ -565,7 +565,6 @@ _sh_propagate(struct vcpu *v,
      * caching attributes in the shadows to match what was asked for.
      */
     if ( (level == 1) && is_hvm_domain(d) &&
-         iomem_access_permitted(d, mfn_x(target_mfn), mfn_x(target_mfn) + 1) &&
          !is_xen_heap_mfn(mfn_x(target_mfn)) )
     {
         unsigned int type;
@@ -581,20 +580,24 @@ _sh_propagate(struct vcpu *v,
             sflags |= pat_type_2_pte_flags(type);
         else if ( d->arch.hvm_domain.is_in_uc_mode )
             sflags |= pat_type_2_pte_flags(PAT_TYPE_UNCACHABLE);
-        else if ( p2mt == p2m_mmio_direct )
-            sflags |= get_pat_flags(v,
-                                    gflags,
-                                    gfn_to_paddr(target_gfn),
-                                    ((paddr_t)mfn_x(target_mfn)) << PAGE_SHIFT,
-                                    MTRR_TYPE_UNCACHABLE); 
-        else if ( iommu_snoop )
-            sflags |= pat_type_2_pte_flags(PAT_TYPE_WRBACK);
         else
-            sflags |= get_pat_flags(v,
-                                    gflags,
-                                    gfn_to_paddr(target_gfn),
-                                    ((paddr_t)mfn_x(target_mfn)) << PAGE_SHIFT,
-                                    NO_HARDCODE_MEM_TYPE);
+            if ( iomem_access_permitted(d, mfn_x(target_mfn), mfn_x(target_mfn) + 1) )
+            {
+                if ( p2mt == p2m_mmio_direct )
+                    sflags |= get_pat_flags(v,
+                            gflags,
+                            gfn_to_paddr(target_gfn),
+                            ((paddr_t)mfn_x(target_mfn)) << PAGE_SHIFT,
+                            MTRR_TYPE_UNCACHABLE); 
+                else if ( iommu_snoop )
+                    sflags |= pat_type_2_pte_flags(PAT_TYPE_WRBACK);
+                else
+                    sflags |= get_pat_flags(v,
+                            gflags,
+                            gfn_to_paddr(target_gfn),
+                            ((paddr_t)mfn_x(target_mfn)) << PAGE_SHIFT,
+                            NO_HARDCODE_MEM_TYPE);
+            }
     }
 
     // Set the A&D bits for higher level shadows.