}
}
-static int __init cpu_idle_key_init(void)
+static int __init cf_check cpu_idle_key_init(void)
{
register_keyhandler('c', dump_cx, "dump ACPI Cx structures", 1);
return 0;
.notifier_call = cpu_callback
};
-static int __init cpuidle_presmp_init(void)
+static int __init cf_check cpuidle_presmp_init(void)
{
void *cpu = (void *)(long)smp_processor_id();
.exit = acpi_cpufreq_cpu_exit,
};
-static int __init cpufreq_driver_init(void)
+static int __init cf_check cpufreq_driver_init(void)
{
int ret = 0;
adjust = 0;
}
-static int __init init_nonfatal_mce_checker(void)
+static int __init cf_check init_nonfatal_mce_checker(void)
{
struct cpuinfo_x86 *c = &boot_cpu_data;
microcode_update_helper, buffer);
}
-static int __init microcode_init(void)
+static int __init cf_check microcode_init(void)
{
/*
* At this point, all CPUs should have updated their microcode
mtrr_if->set_all();
}
-static int __init mtrr_init_finialize(void)
+static int __init cf_check mtrr_init_finialize(void)
{
if (!mtrr_if)
return 0;
.notifier_call = cpu_callback
};
-static int __init vpmu_init(void)
+static int __init cf_check vpmu_init(void)
{
int vendor = current_cpu_data.x86_vendor;
const struct arch_vpmu_ops *ops = NULL;
*/
}
-static int __init init_vcpu_kick_softirq(void)
+static int __init cf_check init_vcpu_kick_softirq(void)
{
open_softirq(VCPU_KICK_SOFTIRQ, vcpu_kick_softirq);
return 0;
#ifndef NDEBUG
#include <asm/traps.h>
-static int __init stub_selftest(void)
+static int __init cf_check stub_selftest(void)
{
static const struct {
uint8_t opc[4];
return true;
}
-static int __init hvm_enable(void)
+static int __init cf_check hvm_enable(void)
{
const struct hvm_function_table *fns = NULL;
/* We need variable length data chunks for XSAVE area and MSRs, hence
* a custom declaration rather than HVM_REGISTER_SAVE_RESTORE.
*/
-static int __init hvm_register_CPU_save_and_restore(void)
+static int __init cf_check hvm_register_CPU_save_and_restore(void)
{
hvm_register_savevm(CPU_XSAVE_CODE,
"CPU_XSAVE",
rcu_read_unlock(&domlist_read_lock);
}
-static int __init dump_irq_info_key_init(void)
+static int __init cf_check dump_irq_info_key_init(void)
{
register_keyhandler('I', dump_irq_info, "dump HVM irq info", 1);
return 0;
static uint8_t __read_mostly pat_entry_tbl[PAT_TYPE_NUMS] =
{ [0 ... PAT_TYPE_NUMS-1] = INVALID_MEM_TYPE };
-static int __init hvm_mtrr_pat_init(void)
+static int __init cf_check hvm_mtrr_pat_init(void)
{
unsigned int i, j;
* iomap[2] set set
*/
-static int __init
-nestedhvm_setup(void)
+static int __init cf_check nestedhvm_setup(void)
{
/* Same format and size as hvm_io_bitmap (Intel needs only 2 pages). */
unsigned nr = cpu_has_vmx ? 2 : 3;
return 0;
}
-static int __init check_port80(void)
+static int __init cf_check check_port80(void)
{
/*
* Quirk table for systems that misbehave (lock up, etc.) if port
/* Syntactic sugar around that function: specify the max number of
* saves, and this calculates the size of buffer needed */
#define HVM_REGISTER_SAVE_RESTORE(_x, _save, _load, _num, _k) \
-static int __init __hvm_register_##_x##_save_and_restore(void) \
+static int __init cf_check __hvm_register_##_x##_save_and_restore(void) \
{ \
hvm_register_savevm(HVM_SAVE_CODE(_x), \
#_x, \
unsigned int (*__read_mostly ioemul_handle_quirk)(
uint8_t opcode, char *io_emul_stub, struct cpu_user_regs *regs);
-static unsigned int ioemul_handle_proliant_quirk(
+static unsigned int cf_check ioemul_handle_proliant_quirk(
u8 opcode, char *io_emul_stub, struct cpu_user_regs *regs)
{
static const char stub[] = {
{ }
};
-static int __init ioport_quirks_init(void)
+static int __init cf_check ioport_quirks_init(void)
{
if ( dmi_check_system(ioport_quirks_tbl) )
ioemul_handle_quirk = ioemul_handle_proliant_quirk;
spin_unlock_irqrestore(&irq_ratelimit_lock, flags);
}
-static int __init irq_ratelimit_init(void)
+static int __init cf_check irq_ratelimit_init(void)
{
if ( irq_ratelimit_threshold )
init_timer(&irq_ratelimit_timer, irq_ratelimit_timer_fn, NULL, 0);
dump_ioapic_irq_info();
}
-static int __init setup_dump_irqs(void)
+static int __init cf_check setup_dump_irqs(void)
{
/* In lieu of being able to live in init_irq_data(). */
BUILD_BUG_ON(sizeof(irq_max_guests) >
__func__, shadow_audit_enable);
}
-static int __init shadow_audit_key_init(void)
+static int __init cf_check shadow_audit_key_init(void)
{
register_keyhandler('O', shadow_audit_key, "toggle shadow audits", 0);
return 0;
}
/* Register this function in the Xen console keypress table */
-static __init int shadow_blow_tables_keyhandler_init(void)
+static int __init cf_check shadow_blow_tables_keyhandler_init(void)
{
register_keyhandler('S', shadow_blow_all_tables, "reset shadow pagetables", 1);
return 0;
vpci_dump_msi();
}
-static int __init msi_setup_keyhandler(void)
+static int __init cf_check msi_setup_keyhandler(void)
{
register_keyhandler('M', dump_msi, "dump MSI state", 1);
return 0;
printk("%pv: NMI neither pending nor masked\n", v);
}
-static __init int register_nmi_trigger(void)
+static int __init cf_check register_nmi_trigger(void)
{
register_keyhandler('N', do_nmi_trigger, "trigger an NMI", 0);
register_keyhandler('n', do_nmi_stats, "NMI statistics", 1);
rcu_read_unlock(&domlist_read_lock);
}
-static __init int register_numa_trigger(void)
+static int __init cf_check register_numa_trigger(void)
{
register_keyhandler('u', dump_numa, "dump NUMA info", 1);
return 0;
return 1;
}
-static int __init nmi_init(void)
+static int __init cf_check nmi_init(void)
{
__u8 vendor = current_cpu_data.x86_vendor;
__u8 family = current_cpu_data.x86;
.priority = 100 /* highest priority */
};
-static int __init percpu_presmp_init(void)
+static int __init cf_check percpu_presmp_init(void)
{
register_cpu_notifier(&cpu_percpu_nfb);
.priority = -1
};
-static int __init psr_presmp_init(void)
+static int __init cf_check psr_presmp_init(void)
{
if ( (opt_psr & PSR_CMT) && opt_rmid_max )
init_psr_cmt(opt_rmid_max);
static int8_t __read_mostly opt_global_pages = -1;
boolean_runtime_param("global-pages", opt_global_pages);
-static int __init pge_init(void)
+static int __init cf_check pge_init(void)
{
if ( opt_global_pages == -1 )
opt_global_pages = !cpu_has_hypervisor ||
{ }
};
-static int __init reboot_init(void)
+static int __init cf_check reboot_init(void)
{
/*
* Only do the DMI check if reboot_type hasn't been overridden
static struct time_scale __read_mostly pmt_scale;
-static __init int init_pmtmr_scale(void)
+static __init int cf_check init_pmtmr_scale(void)
{
set_time_scale(&pmt_scale, ACPI_PM_FREQUENCY);
return 0;
}
/* Late init function, after all cpus have booted */
-static int __init verify_tsc_reliability(void)
+static int __init cf_check verify_tsc_reliability(void)
{
if ( boot_cpu_has(X86_FEATURE_TSC_RELIABLE) )
{
return ret;
}
-static int __init disable_pit_irq(void)
+static int __init cf_check disable_pit_irq(void)
{
if ( !_disable_pit_irq(hpet_broadcast_init) )
{
printk("No domains have emulated TSC\n");
}
-static int __init setup_dump_softtsc(void)
+static int __init cf_check setup_dump_softtsc(void)
{
register_keyhandler('s', dump_softtsc, "dump softtsc stats", 1);
return 0;
return 0;
}
-static int __init core_parking_init(void)
+static int __init cf_check core_parking_init(void)
{
int ret = 0;
.notifier_call = debugtrace_cpu_callback
};
-static int __init debugtrace_init(void)
+static int __init cf_check debugtrace_init(void)
{
unsigned int cpu;
rcu_read_unlock(&domlist_read_lock);
}
-static int __init dump_evtchn_info_key_init(void)
+static int __init cf_check dump_evtchn_info_key_init(void)
{
register_keyhandler('e', dump_evtchn_info, "dump evtchn info", 1);
return 0;
return rc;
}
-static int __init initialise_gdb(void)
+static int __init cf_check initialise_gdb(void)
{
if ( *opt_gdb == '\0' )
return 0;
printk("%s ] done\n", __func__);
}
-static int __init gnttab_usage_init(void)
+static int __init cf_check gnttab_usage_init(void)
{
register_keyhandler('g', gnttab_usage_print_all,
"print grant table usage", 1);
static HYPFS_STRING_INIT(config, "config");
#endif
-static int __init buildinfo_init(void)
+static int __init cf_check buildinfo_init(void)
{
hypfs_add_dir(&hypfs_root, &buildinfo, true);
static HYPFS_DIR_INIT(params, "params");
-static int __init param_init(void)
+static int __init cf_check param_init(void)
{
struct param_hypfs *param;
crashinfo_maxaddr_bits = fls64(crashinfo_maxaddr) - 1;
}
-static int __init kexec_init(void)
+static int __init cf_check kexec_init(void)
{
void *cpu = (void *)(unsigned long)smp_processor_id();
.notifier_call = cpu_callback
};
-static int __init livepatch_init(void)
+static int __init cf_check livepatch_init(void)
{
unsigned int cpu;
printk(" Dom heap: %lukB free\n", total << (PAGE_SHIFT-10));
}
-static __init int pagealloc_keyhandler_init(void)
+static __init int cf_check pagealloc_keyhandler_init(void)
{
register_keyhandler('m', pagealloc_info, "memory info", 1);
return 0;
}
}
-static __init int register_heap_trigger(void)
+static __init int cf_check register_heap_trigger(void)
{
register_keyhandler('H', dump_heap, "dump heap info", 1);
return 0;
return ~0UL >> shift;
}
-static __init int radix_tree_init_maxindex(void)
+static int __init cf_check radix_tree_init_maxindex(void)
{
unsigned int i;
return val;
}
-static int __init init_boot_random(void)
+static int __init cf_check init_boot_random(void)
{
boot_random = get_random();
return 0;
#endif /* CONFIG_HYPFS */
-static int __init cpupool_init(void)
+static int __init cf_check cpupool_init(void)
{
unsigned int cpu;
spin_unlock(&lock_profile_lock);
}
-static int __init lock_prof_init(void)
+static int __init cf_check lock_prof_init(void)
{
struct lock_profile **q;
.notifier_call = cpu_callback
};
-static int __init cpu_stopmachine_init(void)
+static int __init cf_check cpu_stopmachine_init(void)
{
unsigned int cpu;
for_each_online_cpu ( cpu )
.notifier_call = cpu_callback
};
-static int __init cpufreq_presmp_init(void)
+static int __init cf_check cpufreq_presmp_init(void)
{
register_cpu_notifier(&cpu_nfb);
return 0;
.handle_option = cpufreq_userspace_handle_option
};
-static int __init cpufreq_gov_userspace_init(void)
+static int __init cf_check cpufreq_gov_userspace_init(void)
{
unsigned int cpu;
.governor = cpufreq_governor_performance,
};
-static int __init cpufreq_gov_performance_init(void)
+static int __init cf_check cpufreq_gov_performance_init(void)
{
return cpufreq_register_governor(&cpufreq_gov_performance);
}
.governor = cpufreq_governor_powersave,
};
-static int __init cpufreq_gov_powersave_init(void)
+static int __init cf_check cpufreq_gov_powersave_init(void)
{
return cpufreq_register_governor(&cpufreq_gov_powersave);
}
.handle_option = cpufreq_dbs_handle_option
};
-static int __init cpufreq_gov_dbs_init(void)
+static int __init cf_check cpufreq_gov_dbs_init(void)
{
return cpufreq_register_governor(&cpufreq_gov_dbs);
}
int amd_iommu_init(bool xt);
int amd_iommu_init_late(void);
int amd_iommu_update_ivrs_mapping_acpi(void);
-int iov_adjust_irq_affinities(void);
+int cf_check iov_adjust_irq_affinities(void);
int amd_iommu_quarantine_init(struct domain *d);
return 1;
}
-int iov_adjust_irq_affinities(void)
+int cf_check iov_adjust_irq_affinities(void)
{
const struct amd_iommu *iommu;
pcidevs_unlock();
}
-static int __init setup_dump_pcidevs(void)
+static int __init cf_check setup_dump_pcidevs(void)
{
register_keyhandler('Q', dump_pci_devices, "dump PCI devices", 1);
return 0;
spin_unlock_irqrestore(&desc->lock, flags);
}
-static int adjust_vtd_irq_affinities(void)
+static int cf_check adjust_vtd_irq_affinities(void)
{
struct acpi_drhd_unit *drhd;
.notifier_call = cpu_callback,
};
-static int __init setup_dpci_softirq(void)
+static int __init cf_check setup_dpci_softirq(void)
{
unsigned int cpu;