if (pmm7 == 0xFF)
break;
pmm7 &= 0xFC; /* clear pmm7[1:0] */
- pci_conf_write8(0, 0, 0x18+node, 0x3, 0x87, pmm7);
+ pci_conf_write8(PCI_SBDF(0, 0, 0x18 + node, 3), 0x87, pmm7);
printk ("AMD: Disabling C1 Clock Ramping Node #%x\n", node);
}
}
return pci_conf_read(PCI_CONF_ADDRESS(sbdf, reg), 0, 4);
}
-#undef PCI_CONF_ADDRESS
-#define PCI_CONF_ADDRESS(bus, dev, func, reg) \
- (0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | (reg & ~3))
-
-void pci_conf_write8(
- unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func,
- unsigned int reg, uint8_t data)
+void pci_conf_write8(pci_sbdf_t sbdf, unsigned int reg, uint8_t data)
{
- if ( seg || reg > 255 )
- pci_mmcfg_write(seg, bus, PCI_DEVFN(dev, func), reg, 1, data);
+ if ( sbdf.seg || reg > 255 )
+ pci_mmcfg_write(sbdf.seg, sbdf.bus, sbdf.devfn, reg, 1, data);
else
- {
- BUG_ON((bus > 255) || (dev > 31) || (func > 7));
- pci_conf_write(PCI_CONF_ADDRESS(bus, dev, func, reg), reg & 3, 1, data);
- }
+ pci_conf_write(PCI_CONF_ADDRESS(sbdf, reg), reg & 3, 1, data);
}
+#undef PCI_CONF_ADDRESS
+#define PCI_CONF_ADDRESS(bus, dev, func, reg) \
+ (0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | (reg & ~3))
+
void pci_conf_write16(
unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func,
unsigned int reg, uint16_t data)
case ACPI_ADR_SPACE_PCI_CONFIG:
printk("Resetting with ACPI PCI RESET_REG.\n");
/* Write the value that resets us. */
- pci_conf_write8(0, 0,
- (rr->address >> 32) & 31,
- (rr->address >> 16) & 7,
+ pci_conf_write8(PCI_SBDF(0, 0, rr->address >> 32,
+ rr->address >> 16),
(rr->address & 255),
reset_value);
break;
if ( (cap & 0xff) == 1 && (cap & EHCI_USBLEGSUP_BIOS) )
{
dbgp_printk("dbgp: BIOS handoff\n");
- pci_conf_write8(0, dbgp->bus, dbgp->slot, dbgp->func, offset + 3, 1);
+ pci_conf_write8(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func),
+ offset + 3, 1);
}
/* if boot firmware now owns EHCI, spin till it hands it over. */
/* well, possibly buggy BIOS... try to shut it down,
* and hope nothing goes too wrong */
dbgp_printk("dbgp: BIOS handoff failed: %08x\n", cap);
- pci_conf_write8(0, dbgp->bus, dbgp->slot, dbgp->func, offset + 2, 0);
+ pci_conf_write8(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func),
+ offset + 2, 0);
}
/* just in case, always disable EHCI SMIs */
- pci_conf_write8(0, dbgp->bus, dbgp->slot, dbgp->func,
+ pci_conf_write8(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func),
offset + EHCI_USBLEGCTLSTS, 0);
}
*/
if ( reg & 1 )
{
- pci_conf_write8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg,
- data);
+ pci_conf_write8(sbdf, reg, data);
pci_conf_write16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg + 1,
data >> 8);
}
{
pci_conf_write16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg,
data);
- pci_conf_write8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg + 2,
- data >> 16);
+ pci_conf_write8(sbdf, reg + 2, data >> 16);
}
break;
break;
case 1:
- pci_conf_write8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg, data);
+ pci_conf_write8(sbdf, reg, data);
break;
default:
uint8_t pci_conf_read8(pci_sbdf_t sbdf, unsigned int reg);
uint16_t pci_conf_read16(pci_sbdf_t sbdf, unsigned int reg);
uint32_t pci_conf_read32(pci_sbdf_t sbdf, unsigned int reg);
-void pci_conf_write8(
- unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func,
- unsigned int reg, uint8_t data);
+void pci_conf_write8(pci_sbdf_t sbdf, unsigned int reg, uint8_t data);
void pci_conf_write16(
unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func,
unsigned int reg, uint16_t data);