]> xenbits.xensource.com Git - people/sstabellini/linux-pvhvm-deprecated.git/commitdiff
HACK: hacks -- many and varied
authorIan Campbell <ian.campbell@citrix.com>
Thu, 1 Mar 2012 16:22:16 +0000 (16:22 +0000)
committerStefano Stabellini <stefano.stabellini@eu.citrix.com>
Fri, 8 Jun 2012 11:58:13 +0000 (11:58 +0000)
arch/arm/boot/compressed/head.S
arch/arm/boot/dts/vexpress-v2m-rs1-rtsm.dtsi
arch/arm/boot/dts/vexpress-v2p-aem-v7a.dts
arch/arm/include/asm/xen/interface.h
arch/arm/kernel/arch_timer.c
arch/arm/mach-vexpress/Makefile.boot
arch/arm/mach-vexpress/v2m.c
arch/arm/mm/mmu.c
arch/arm/mm/proc-v7.S
include/xen/interface/memory.h

index c5d60250d43daf44205cd830de3ca6ed941ed348..c51d63411a6e11035fd13e530b51f877b59baea1 100644 (file)
@@ -258,6 +258,9 @@ restart:    adr     r0, LC0
                */
                add     sp, sp, #0x10000
                stmfd   sp!, {r0-r3, ip, lr}
+               ldr     r1, =atags_to_fdt
+               add     r0, r1, r0
+               ldr     r1, [r0]
                mov     r0, r8
                mov     r1, r6
                sub     r2, sp, r6
index 16076e2d093410b25dd3f8e1f43e38ef57f8ffd7..82877199bc3b83489f507b92ca0305461e35aec2 100644 (file)
                                interrupts = <6>;
                        };
 
+/*
                        v2m_serial2: uart@0b0000 {
                                compatible = "arm,pl011", "arm,primecell";
                                reg = <0x0b0000 0x1000>;
                                reg = <0x0c0000 0x1000>;
                                interrupts = <8>;
                        };
+*/
 
                        wdt@0f0000 {
                                compatible = "arm,sp805", "arm,primecell";
index f94bfc3bc33be3c708a4cde0ed7a370dd70c6329..62542a9613f87c23b280384666e84a87a277310c 100644 (file)
@@ -16,8 +16,8 @@
        aliases {
                serial0 = &v2m_serial0;
                serial1 = &v2m_serial1;
-               serial2 = &v2m_serial2;
-               serial3 = &v2m_serial3;
+/*             serial2 = &v2m_serial2;
+               serial3 = &v2m_serial3;*/
                i2c0 = &v2m_i2c_dvi;
                i2c1 = &v2m_i2c_pcie;
        };
index 65577de6ce715329764786d91aa36921747c4573..3ad2d4b46d865999e35552bd3ea67eacd27db9f5 100644 (file)
@@ -25,6 +25,7 @@
        } while (0)
 
 typedef uint64_t xen_pfn_t;
+#define PRI_xen_pfn "llx"
 
 #ifndef __ASSEMBLY__
 /* Guest handles for primitive C types. */
index db6afc61b72b567a0438757671f815f63e1cede9..46ee90e2abf1ffaecdea03b1638f0e92a27b8828 100644 (file)
@@ -110,7 +110,6 @@ static irqreturn_t arch_timer_handler(int irq, void *dev_id)
 
        return IRQ_NONE;
 }
-
 static void arch_timer_disable(void)
 {
        unsigned long ctrl;
index 768a710be55dc13681c41dbd27b563d49e7c024e..48b9eccd61af808634a2d780ed12013432094808 100644 (file)
@@ -7,4 +7,5 @@ initrd_phys-y   := 0x60800000
 dtb-$(CONFIG_ARCH_VEXPRESS_DT) += vexpress-v2p-ca5s.dtb \
                                   vexpress-v2p-ca9.dtb \
                                   vexpress-v2p-ca15-tc1.dtb \
-                                  vexpress-v2p-aem-v7a.dtb
+                                  vexpress-v2p-aem-v7a.dtb \
+                                  vexpress-virt.dtb
index c5aff7b4081757d1e4dc8b4c69d8d2c2a80615e1..0efee2af622be8222a680b6d0396956af806efa9 100644 (file)
@@ -29,6 +29,7 @@
 #include <asm/hardware/gic.h>
 #include <asm/hardware/timer-sp.h>
 #include <asm/hardware/sp810.h>
+#include <asm/arch_timer.h>
 
 #include <mach/ct-ca9x4.h>
 #include <mach/motherboard.h>
@@ -68,6 +69,7 @@ static void __init v2m_sysctl_init(void __iomem *base)
        writel(scctrl, base + SCCTRL);
 }
 
+#ifndef CONFIG_ARM_ARCH_TIMER
 static void __init v2m_sp804_init(void __iomem *base, unsigned int irq)
 {
        if (WARN_ON(!base || irq == NO_IRQ))
@@ -79,11 +81,14 @@ static void __init v2m_sp804_init(void __iomem *base, unsigned int irq)
        sp804_clocksource_init(base + TIMER_2_BASE, "v2m-timer1");
        sp804_clockevents_init(base + TIMER_1_BASE, irq, "v2m-timer0");
 }
+#endif
 
 static void __init v2m_timer_init(void)
 {
+#ifndef CONFIG_ARM_ARCH_TIMER
        v2m_sysctl_init(ioremap(V2M_SYSCTL, SZ_4K));
        v2m_sp804_init(ioremap(V2M_TIMER01, SZ_4K), IRQ_V2M_TIMER0);
+#endif
 }
 
 static struct sys_timer v2m_timer = {
@@ -299,8 +304,8 @@ static AMBA_DEVICE(kmi0,  "mb:kmi0",  V2M_KMI0, NULL);
 static AMBA_DEVICE(kmi1,  "mb:kmi1",  V2M_KMI1, NULL);
 static AMBA_DEVICE(uart0, "mb:uart0", V2M_UART0, NULL);
 static AMBA_DEVICE(uart1, "mb:uart1", V2M_UART1, NULL);
-static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL);
-static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL);
+//static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL);
+//static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL);
 static AMBA_DEVICE(wdt,   "mb:wdt",   V2M_WDT, NULL);
 static AMBA_DEVICE(rtc,   "mb:rtc",   V2M_RTC, NULL);
 
@@ -311,8 +316,8 @@ static struct amba_device *v2m_amba_devs[] __initdata = {
        &kmi1_device,
        &uart0_device,
        &uart1_device,
-       &uart2_device,
-       &uart3_device,
+//     &uart2_device,
+//     &uart3_device,
        &wdt_device,
        &rtc_device,
 };
@@ -362,12 +367,12 @@ static struct clk_lookup v2m_lookups[] = {
        }, {    /* UART1 */
                .dev_id         = "mb:uart1",
                .clk            = &osc2_clk,
-       }, {    /* UART2 */
-               .dev_id         = "mb:uart2",
-               .clk            = &osc2_clk,
-       }, {    /* UART3 */
-               .dev_id         = "mb:uart3",
-               .clk            = &osc2_clk,
+//     }, {    /* UART2 */
+//             .dev_id         = "mb:uart2",
+//             .clk            = &osc2_clk,
+//     }, {    /* UART3 */
+//             .dev_id         = "mb:uart3",
+//             .clk            = &osc2_clk,
        }, {    /* KMI0 */
                .dev_id         = "mb:kmi0",
                .clk            = &osc2_clk,
@@ -398,7 +403,11 @@ static void __init v2m_init_early(void)
 {
        ct_desc->init_early();
        clkdev_add_table(v2m_lookups, ARRAY_SIZE(v2m_lookups));
+#ifdef CONFIG_ARM_ARCH_TIMER
+       arch_timer_sched_clock_init();
+#else
        versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000);
+#endif
 }
 
 static void v2m_power_off(void)
@@ -545,12 +554,12 @@ static struct clk_lookup v2m_dt_lookups[] = {
        }, {    /* PL011 UART1 */
                .dev_id         = "1000a000.uart",
                .clk            = &osc2_clk,
-       }, {    /* PL011 UART2 */
-               .dev_id         = "1000b000.uart",
-               .clk            = &osc2_clk,
-       }, {    /* PL011 UART3 */
-               .dev_id         = "1000c000.uart",
-               .clk            = &osc2_clk,
+//     }, {    /* PL011 UART2 */
+//             .dev_id         = "1000b000.uart",
+//             .clk            = &osc2_clk,
+//     }, {    /* PL011 UART3 */
+//             .dev_id         = "1000c000.uart",
+//             .clk            = &osc2_clk,
        }, {    /* SP805 WDT */
                .dev_id         = "1000f000.wdt",
                .clk            = &v2m_ref_clk,
@@ -574,12 +583,12 @@ static struct clk_lookup v2m_dt_lookups[] = {
        }, {    /* PL011 UART1 */
                .dev_id         = "1c0a0000.uart",
                .clk            = &osc2_clk,
-       }, {    /* PL011 UART2 */
-               .dev_id         = "1c0b0000.uart",
-               .clk            = &osc2_clk,
-       }, {    /* PL011 UART3 */
-               .dev_id         = "1c0c0000.uart",
-               .clk            = &osc2_clk,
+//     }, {    /* PL011 UART2 */
+//             .dev_id         = "1c0b0000.uart",
+//             .clk            = &osc2_clk,
+//     }, {    /* PL011 UART3 */
+//             .dev_id         = "1c0c0000.uart",
+//             .clk            = &osc2_clk,
        }, {    /* SP805 WDT */
                .dev_id         = "1c0f0000.wdt",
                .clk            = &v2m_ref_clk,
@@ -597,28 +606,35 @@ void __init v2m_dt_init_early(void)
 
        node = of_find_compatible_node(NULL, NULL, "arm,vexpress-sysreg");
        reg = of_get_property(node, "reg", NULL);
-       if (WARN_ON(!reg))
-               return;
+       WARN_ON(!reg);
 
-       v2m_sysreg_base = V2M_PERIPH + be32_to_cpup(reg);
+       if (reg) {
+               v2m_sysreg_base = V2M_PERIPH + be32_to_cpup(reg);
 
-       /* Confirm board type against DT property, if available */
-       if (of_property_read_u32(allnodes, "arm,hbi", &dt_hbi) == 0) {
-               u32 misc = readl(v2m_sysreg_base + V2M_SYS_MISC);
-               u32 id = readl(v2m_sysreg_base + (misc & SYS_MISC_MASTERSITE ?
-                               V2M_SYS_PROCID1 : V2M_SYS_PROCID0));
-               u32 hbi = id & SYS_PROCIDx_HBI_MASK;
+               /* Confirm board type against DT property, if available */
+               if (of_property_read_u32(allnodes, "arm,hbi", &dt_hbi) == 0) {
+                       u32 misc = readl(v2m_sysreg_base + V2M_SYS_MISC);
+                       u32 id = readl(v2m_sysreg_base + (misc & SYS_MISC_MASTERSITE ?
+                                                         V2M_SYS_PROCID1 : V2M_SYS_PROCID0));
+                       u32 hbi = id & SYS_PROCIDx_HBI_MASK;
 
-               if (WARN_ON(dt_hbi != hbi))
-                       pr_warning("vexpress: DT HBI (%x) is not matching "
-                                       "hardware (%x)!\n", dt_hbi, hbi);
-       }
+                       if (WARN_ON(dt_hbi != hbi))
+                               pr_warning("vexpress: DT HBI (%x) is not matching "
+                                          "hardware (%x)!\n", dt_hbi, hbi);
+               }
 
-       clkdev_add_table(v2m_dt_lookups, ARRAY_SIZE(v2m_dt_lookups));
+               clkdev_add_table(v2m_dt_lookups, ARRAY_SIZE(v2m_dt_lookups));
+       }
+#ifdef CONFIG_ARM_ARCH_TIMER
+       arch_timer_sched_clock_init();
+#else
        versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000);
+#endif
 
+       //if (reg) {
        pm_power_off = v2m_power_off;
        arm_pm_restart = v2m_restart;
+       //}
 }
 
 static  struct of_device_id vexpress_irq_match[] __initdata = {
@@ -634,17 +650,25 @@ static void __init v2m_dt_init_irq(void)
 static void __init v2m_dt_timer_init(void)
 {
        struct device_node *node;
+#ifndef CONFIG_ARM_ARCH_TIMER
        const char *path;
+#endif
        int err;
 
        node = of_find_compatible_node(NULL, NULL, "arm,sp810");
        v2m_sysctl_init(of_iomap(node, 0));
 
+#ifdef CONFIG_ARM_ARCH_TIMER
+       err = arch_timer_register(NULL);
+       if (WARN_ON(err))
+               return;
+#else
        err = of_property_read_string(of_aliases, "arm,v2m_timer", &path);
        if (WARN_ON(err))
                return;
        node = of_find_node_by_path(path);
        v2m_sp804_init(of_iomap(node, 0), irq_of_parse_and_map(node, 0));
+#endif
 }
 
 static struct sys_timer v2m_dt_timer = {
index dc8c550e6cbde82ae786488dadc33d92550c1d0c..7d82bb7eb62d9b7351760d9a11d135a79f0e7c76 100644 (file)
@@ -78,18 +78,18 @@ static struct cachepolicy cache_policies[] __initdata = {
        }, {
                .policy         = "writethrough",
                .cr_mask        = 0,
-               .pmd            = PMD_SECT_WT,
-               .pte            = L_PTE_MT_WRITETHROUGH,
+               .pmd            = PMD_SECT_BUFFERED, //PMD_SECT_WT,
+               .pte            = L_PTE_MT_BUFFERABLE, //L_PTE_MT_WRITETHROUGH,
        }, {
                .policy         = "writeback",
                .cr_mask        = 0,
-               .pmd            = PMD_SECT_WB,
-               .pte            = L_PTE_MT_WRITEBACK,
+               .pmd            = PMD_SECT_BUFFERED, //PMD_SECT_WB,
+               .pte            = L_PTE_MT_BUFFERABLE, //L_PTE_MT_WRITEBACK,
        }, {
                .policy         = "writealloc",
                .cr_mask        = 0,
-               .pmd            = PMD_SECT_WBWA,
-               .pte            = L_PTE_MT_WRITEALLOC,
+               .pmd            = PMD_SECT_BUFFERED, //PMD_SECT_WBWA,
+               .pte            = L_PTE_MT_BUFFERABLE, //L_PTE_MT_WRITEALLOC,
        }
 };
 
index 4f56b3ffe88b230ff5e5678d9925ea8e14f7be43..b94f57a19606b1425e2de4d8ed7cc00e067e8816 100644 (file)
 
 /* PTWs cacheable, inner WB not shareable, outer WB not shareable */
 #define TTB_FLAGS_UP   TTB_IRGN_NC|TTB_RGN_NC
-#define PMD_FLAGS_UP   PMD_SECT_WB
+#define PMD_FLAGS_UP   PMD_SECT_BUFFERED // PMD_SECT_WB
 
 /* PTWs cacheable, inner WBWA shareable, outer WBWA not shareable */
 #define TTB_FLAGS_SMP  TTB_IRGN_NC|TTB_S|TTB_NOS|TTB_RGN_NC
-#define PMD_FLAGS_SMP  PMD_SECT_WBWA|PMD_SECT_S
+#define PMD_FLAGS_SMP  PMD_SECT_BUFFERED|PMD_SECT_S // PMD_SECT_WBWA|PMD_SECT_S
 
 ENTRY(cpu_v7_proc_init)
        mov     pc, lr
index bc12867835204e187f3336a22639241ec8b04040..ec689458ebba64fc759c20359736749a6ef9eaa4 100644 (file)
@@ -163,6 +163,9 @@ struct xen_add_to_physmap {
     /* Which domain to change the mapping for. */
     domid_t domid;
 
+    /* Number of pages to go through for gmfn_range */
+    uint16_t    size;
+
     /* Source mapping space. */
 #define XENMAPSPACE_shared_info  0 /* shared info page */
 #define XENMAPSPACE_grant_table  1 /* grant table page */