void __iomem *base;
base = entry->mask_base;
- msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
- msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
+ msg->address = readq(base + PCI_MSIX_ENTRY_ADDRESS_OFFSET);
msg->data = readl(base + PCI_MSIX_ENTRY_DATA_OFFSET);
break;
}
void __iomem *base;
base = entry->mask_base;
- writel(msg->address_lo,
- base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
- writel(msg->address_hi,
- base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
+ writeq(msg->address, base + PCI_MSIX_ENTRY_ADDRESS_OFFSET);
writel(msg->data, base + PCI_MSIX_ENTRY_DATA_OFFSET);
break;
}
};
struct msi_msg {
- u32 address_lo; /* low 32 bits of msi message address */
- u32 address_hi; /* high 32 bits of msi message address */
+ union {
+ u64 address; /* message address */
+ struct {
+ u32 address_lo; /* message address low 32 bits */
+ u32 address_hi; /* message address high 32 bits */
+ };
+ };
u32 data; /* 16 bits of msi message data */
u32 dest32; /* used when Interrupt Remapping with EIM is enabled */
};
#define PCI_MSIX_BIRMASK (7 << 0)
#define PCI_MSIX_ENTRY_SIZE 16
+#define PCI_MSIX_ENTRY_ADDRESS_OFFSET 0
#define PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET 0
#define PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET 4
#define PCI_MSIX_ENTRY_DATA_OFFSET 8