]> xenbits.xensource.com Git - libvirt.git/commitdiff
cpu_map.xml: Expand SandyBridge CPU model
authorJiri Denemark <jdenemar@redhat.com>
Tue, 23 Jun 2015 13:08:40 +0000 (15:08 +0200)
committerJiri Denemark <jdenemar@redhat.com>
Thu, 2 Jul 2015 08:09:41 +0000 (10:09 +0200)
Inheritance among CPU model is cool but it makes reviewing CPU model
definitions and comparing them to CPU models from QEMU rather hard and
unpleasant. Let's define all CPU models from scratch.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
src/cpu/cpu_map.xml

index 71235bc8a33e3f1795c80a1606e5603df0023084..7e9dedf4a6e120c5a3f73ecfed5f6eadeac83d42 100644 (file)
     </model>
 
     <model name='Haswell-noTSX'>
-      <model name='SandyBridge'/>
+      <vendor name='Intel'/>
+      <feature name='aes'/>
+      <feature name='apic'/>
+      <feature name='avx'/>
       <feature name='avx2'/>
       <feature name='bmi1'/>
       <feature name='bmi2'/>
+      <feature name='clflush'/>
+      <feature name='cmov'/>
+      <feature name='cx16'/>
+      <feature name='cx8'/>
+      <feature name='de'/>
       <feature name='erms'/>
       <feature name='fma'/>
+      <feature name='fpu'/>
       <feature name='fsgsbase'/>
+      <feature name='fxsr'/>
       <feature name='invpcid'/>
+      <feature name='lahf_lm'/>
+      <feature name='lm'/>
+      <feature name='mca'/>
+      <feature name='mce'/>
+      <feature name='mmx'/>
       <feature name='movbe'/>
+      <feature name='msr'/>
+      <feature name='mtrr'/>
+      <feature name='nx'/>
+      <feature name='pae'/>
+      <feature name='pat'/>
       <feature name='pcid'/>
+      <feature name='pclmuldq'/>
+      <feature name='pge'/>
+      <feature name='pni'/>
+      <feature name='popcnt'/>
+      <feature name='pse'/>
+      <feature name='pse36'/>
+      <feature name='rdtscp'/>
+      <feature name='sep'/>
       <feature name='smep'/>
+      <feature name='sse'/>
+      <feature name='sse2'/>
+      <feature name='sse4.1'/>
+      <feature name='sse4.2'/>
+      <feature name='ssse3'/>
+      <feature name='syscall'/>
+      <feature name='tsc'/>
+      <feature name='tsc-deadline'/>
+      <feature name='x2apic'/>
+      <feature name='xsave'/>
     </model>
 
     <model name='Haswell'>