]> xenbits.xensource.com Git - people/liuw/ovmf.git/commitdiff
ArmPkg/CpuDxe: Removed LR adjustement for SVC call
authorOlivier Martin <olivier.martin@arm.com>
Thu, 28 Nov 2013 21:38:56 +0000 (21:38 +0000)
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>
Thu, 28 Nov 2013 21:38:56 +0000 (21:38 +0000)
The Link Register (LR) does not need adjustement when receiving a Supervisor Call (SVC).
Note: SVC might be generated by debuggers.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14911 6f19259b-4bc3-4df7-8a09-765794883524

ArmPkg/Drivers/CpuDxe/ArmV6/ExceptionSupport.S
ArmPkg/Drivers/CpuDxe/ArmV6/ExceptionSupport.asm

index 612ca02c7b330875e386c3a48b274868ca96db24..430bc5202d8b859187f2401cc9265f3291944989 100644 (file)
@@ -120,7 +120,6 @@ ASM_PFX(UndefinedInstructionEntry):
   bx        R1\r
 \r
 ASM_PFX(SoftwareInterruptEntry):\r
-  sub       LR, LR, #4                @ Only -2 for Thumb, adjust in CommonExceptionEntry\r
   srsdb     #0x13!                    @ Store return state on SVC stack\r
                                       @ We are already in SVC mode\r
   stmfd     SP!,{LR}                  @ Store the link register for the current mode\r
index 780e1f7cd385cc9196fa675c8f23255bc9926509..f9672e4b6422f39b2def24e578b27dc22ca3f16b 100644 (file)
@@ -115,7 +115,6 @@ UndefinedInstructionEntry
   bx        R1\r
 \r
 SoftwareInterruptEntry\r
-  sub       LR, LR, #4                ; Only -2 for Thumb, adjust in CommonExceptionEntry\r
   srsfd     #0x13!                    ; Store return state on SVC stack\r
                                       ; We are already in SVC mode\r
   stmfd     SP!,{LR}                  ; Store the link register for the current mode\r