arm64: sve: Provide a conditional update accessor for ZCR_ELx

A common pattern is to conditionally update ZCR_ELx in order
to avoid the "self-synchronizing" effect that writing to this
register has.

Let's provide an accessor that does exactly this.

Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>

diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
index bec5f14b622ae2fd50e471803418ca6c91c624f0..05c9c55768b8ed5efd0722333d2ca730c241f888 100644 (file)
--- a/arch/arm64/include/asm/fpsimd.h
+++ b/arch/arm64/include/asm/fpsimd.h
@@ -130,6 +130,15 @@ static inline void sve_user_enable(void)
        sysreg_clear_set(cpacr_el1, 0, CPACR_EL1_ZEN_EL0EN);
 }
 
+#define sve_cond_update_zcr_vq(val, reg)               \
+       do {                                            \
+               u64 __zcr = read_sysreg_s((reg));       \
+               u64 __new = __zcr & ~ZCR_ELx_LEN_MASK;  \
+               __new |= (val) & ZCR_ELx_LEN_MASK;      \
+               if (__zcr != __new)                     \
+                       write_sysreg_s(__new, (reg));   \
+       } while (0)
+
 /*
  * Probing and setup functions.
  * Calls to these functions must be serialised with one another.