#include <xen/sched.h>
#include <xen/pci.h>
#include <xen/pci_regs.h>
+#include <xen/pci_ids.h>
#include <xen/list.h>
#include <xen/prefetch.h>
#include <xen/iommu.h>
#undef PCI_STATUS_CHECK
}
+static void apply_quirks(struct pci_dev *pdev)
+{
+ uint16_t vendor = pci_conf_read16(pdev->seg, pdev->bus,
+ PCI_SLOT(pdev->devfn),
+ PCI_FUNC(pdev->devfn), PCI_VENDOR_ID);
+ uint16_t device = pci_conf_read16(pdev->seg, pdev->bus,
+ PCI_SLOT(pdev->devfn),
+ PCI_FUNC(pdev->devfn), PCI_DEVICE_ID);
+ static const struct {
+ uint16_t vendor, device;
+ } ignore_bars[] = {
+ /*
+ * Device [8086:2fc0]
+ * Erratum HSE43
+ * CONFIG_TDP_NOMINAL CSR Implemented at Incorrect Offset
+ * http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v3-spec-update.html
+ */
+ { PCI_VENDOR_ID_INTEL, 0x2fc0 },
+ /*
+ * Devices [8086:6f60,6fa0,6fc0]
+ * Errata BDF2 / BDX2
+ * PCI BARs in the Home Agent Will Return Non-Zero Values During Enumeration
+ * http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v4-spec-update.html
+ */
+ { PCI_VENDOR_ID_INTEL, 0x6f60 },
+ { PCI_VENDOR_ID_INTEL, 0x6fa0 },
+ { PCI_VENDOR_ID_INTEL, 0x6fc0 },
+ };
+ unsigned int i;
+
+ for ( i = 0; i < ARRAY_SIZE(ignore_bars); i++)
+ if ( vendor == ignore_bars[i].vendor &&
+ device == ignore_bars[i].device )
+ /*
+ * For these errata force ignoring the BARs, which prevents vPCI
+ * from trying to size the BARs or add handlers to trap accesses.
+ */
+ pdev->ignore_bars = true;
+}
+
static struct pci_dev *alloc_pdev(struct pci_seg *pseg, u8 bus, u8 devfn)
{
struct pci_dev *pdev;
}
check_pdev(pdev);
+ apply_quirks(pdev);
return pdev;
}