* cases, and the generated policy must be compatible with a 4.13.
*
* Either pass a full new @featureset (and @nr_features), or adjust individual
- * features (@pae).
+ * features (@pae, @itsc).
*
* Then (optionally) apply legacy XEND overrides (@xend) to the result.
*/
int xc_cpuid_apply_policy(xc_interface *xch,
uint32_t domid, bool restore,
const uint32_t *featureset,
- unsigned int nr_features, bool pae,
+ unsigned int nr_features, bool pae, bool itsc,
const struct xc_xend_cpuid *xend);
int xc_mca_op(xc_interface *xch, struct xen_mc *mc);
int xc_mca_op_inject_v2(xc_interface *xch, unsigned int flags,
int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore,
const uint32_t *featureset, unsigned int nr_features,
- bool pae,
+ bool pae, bool itsc,
const struct xc_xend_cpuid *xend)
{
int rc;
}
else
{
+ p->extd.itsc = itsc;
+
if ( di.hvm )
p->basic.pae = pae;
}
}
/*
- * These settings are necessary to cause earlier HVM_PARAM_NESTEDHVM /
- * XEN_DOMCTL_disable_migrate settings to be reflected correctly in
- * CPUID. Xen will discard these bits if configuration hasn't been
- * set for the domain.
+ * These settings are necessary to cause earlier HVM_PARAM_NESTEDHVM
+ * to be reflected correctly in CPUID. Xen will discard these bits if
+ * configuration hasn't been set for the domain.
*/
- p->extd.itsc = true;
p->basic.vmx = true;
p->extd.svm = true;
}
libxl_domain_build_info *info)
{
bool pae = true;
+ bool itsc;
/*
* For PV guests, PAE is Xen-controlled (it is the 'p' that differentiates
if (info->type == LIBXL_DOMAIN_TYPE_HVM)
pae = libxl_defbool_val(info->u.hvm.pae);
- xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, pae, info->cpuid);
+ /*
+ * Advertising Invariant TSC to a guest means that the TSC frequency won't
+ * change at any point in the future.
+ *
+ * We do not have enough information about potential migration
+ * destinations to know whether advertising ITSC is safe, but if the guest
+ * isn't going to migrate, then the current hardware is all that matters.
+ *
+ * Alternatively, an internal property of vTSC is that the values read are
+ * invariant. Advertise ITSC when we know the domain will have emualted
+ * TSC everywhere it goes.
+ */
+ itsc = (libxl_defbool_val(info->disable_migrate) ||
+ info->tsc_mode == LIBXL_TSC_MODE_ALWAYS_EMULATE);
+
+ xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0,
+ pae, itsc, info->cpuid);
}
static const char *input_names[2] = { "leaf", "subleaf" };
__clear_bit(X86_FEATURE_SYSCALL, max_fs);
}
- /*
- * ITSC is masked by default (so domains are safe to migrate), but a
- * toolstack which has configured disable_migrate or vTSC for a domain may
- * safely select it, and needs a way of doing so.
- */
- if ( cpu_has_itsc && (d->disable_migrate || d->arch.vtsc) )
- __set_bit(X86_FEATURE_ITSC, max_fs);
-
/*
* On hardware with MSR_TSX_CTRL, the admin may have elected to disable
* TSX and hide the feature bits. Migrating-in VMs may have been booted
}
}
- recalculate_cpuid_policy(d);
-
return 0;
}
XEN_CPUFEATURE(ENQCMD, 6*32+29) /* ENQCMD{,S} instructions */
/* AMD-defined CPU features, CPUID level 0x80000007.edx, word 7 */
-XEN_CPUFEATURE(ITSC, 7*32+ 8) /* Invariant TSC */
+XEN_CPUFEATURE(ITSC, 7*32+ 8) /*a Invariant TSC */
XEN_CPUFEATURE(EFRO, 7*32+10) /* APERF/MPERF Read Only interface */
/* AMD-defined CPU features, CPUID level 0x80000008.ebx, word 8 */