]> xenbits.xensource.com Git - xen.git/commitdiff
CONFIG: remove #ifdef __ia64__ from the x86 arch tree
authorAndrew Cooper <andrew.cooper3@citrix.com>
Thu, 9 Feb 2012 14:20:49 +0000 (06:20 -0800)
committerAndrew Cooper <andrew.cooper3@citrix.com>
Thu, 9 Feb 2012 14:20:49 +0000 (06:20 -0800)
__ia64__ really really should not be defined in the x86 arch subtree,
so remove it from xen/include/public/arch-x86/hvm/save.h

This in turn allows the removal of VIOAPIC_IS_IOSAPIC, as x86 does not
use streamlined {IO,L}APICs, allowing for the removal of more code
from the x86 tree.

Changes since v2:
 *  Leave the EOI register write protected by VIOAPIC_VERSION_ID >=
    0x20.  Currently, only version 0x11 is emulated, but leave this
    correct code in place in case a decision is make to emulate the
    newer version.

Changes since v1:
 *  Refresh patch following the decision not to try emulating a
    version 0x20 IOAPIC

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Committed-by: Keir Fraser <keir@xen.org>
xen/arch/x86/hvm/vioapic.c
xen/include/asm-x86/hvm/vioapic.h
xen/include/public/arch-x86/hvm/save.h

index 403224f82899da1cc44bf4c6672631d6b4385aff..d3de695c365b84435ed94cf2699eb37e0b6122d7 100644 (file)
@@ -59,12 +59,10 @@ static unsigned long vioapic_read_indirect(struct hvm_hw_vioapic *vioapic,
                   | (VIOAPIC_VERSION_ID & 0xff));
         break;
 
-#if !VIOAPIC_IS_IOSAPIC
     case VIOAPIC_REG_APIC_ID:
     case VIOAPIC_REG_ARB_ID:
         result = ((vioapic->id & 0xf) << 24);
         break;
-#endif
 
     default:
     {
@@ -179,14 +177,12 @@ static void vioapic_write_indirect(
         /* Writes are ignored. */
         break;
 
-#if !VIOAPIC_IS_IOSAPIC
     case VIOAPIC_REG_APIC_ID:
         vioapic->id = (val >> 24) & 0xf;
         break;
 
     case VIOAPIC_REG_ARB_ID:
         break;
-#endif
 
     default:
     {
@@ -227,7 +223,7 @@ static int vioapic_write(
         vioapic_write_indirect(vioapic, length, val);
         break;
 
-#if VIOAPIC_IS_IOSAPIC
+#if VIOAPIC_VERSION_ID >= 0x20
     case VIOAPIC_REG_EOI:
         vioapic_update_EOI(v->domain, val);
         break;
index 7721ece46cfa7b25254e3b966cb9ae7a8e72a2ba..f2c17535bff330b0fa8733d6c4af81b9043c2f75 100644 (file)
 #include <xen/smp.h>
 #include <public/hvm/save.h>
 
-#if !VIOAPIC_IS_IOSAPIC
 #define VIOAPIC_VERSION_ID 0x11 /* IOAPIC version */
-#else
-#define VIOAPIC_VERSION_ID 0x21 /* IOSAPIC version */
-#endif
 
 #define VIOAPIC_EDGE_TRIG  0
 #define VIOAPIC_LEVEL_TRIG 1
index 7a6fbc9821f4c17f1ae83a9475256f0485f3380d..ac7122e605a80ff06a4ee862ff528edb80fca0d7 100644 (file)
@@ -344,12 +344,7 @@ DECLARE_HVM_SAVE_TYPE(PIC, 3, struct hvm_hw_vpic);
  * IO-APIC
  */
 
-#ifdef __ia64__
-#define VIOAPIC_IS_IOSAPIC 1
-#define VIOAPIC_NUM_PINS  24
-#else
 #define VIOAPIC_NUM_PINS  48 /* 16 ISA IRQs, 32 non-legacy PCI IRQS. */
-#endif
 
 struct hvm_hw_vioapic {
     uint64_t base_address;
@@ -368,13 +363,8 @@ struct hvm_hw_vioapic {
             uint8_t trig_mode:1;
             uint8_t mask:1;
             uint8_t reserve:7;
-#if !VIOAPIC_IS_IOSAPIC
             uint8_t reserved[4];
             uint8_t dest_id;
-#else
-            uint8_t reserved[3];
-            uint16_t dest_id;
-#endif
         } fields;
     } redirtbl[VIOAPIC_NUM_PINS];
 };