passthrough: Change some cryptic numerals into macros

This is just a trivial patch that turns some cryptic numerals in pci
code into macros

Signed-off-by: Liu Yuan yuan.b.liu@intel.com<mailto:yuan.b.liu@intel.com>

diff --git a/hw/pass-through.c b/hw/pass-through.c
index f6ae4b21ab8c3a3a51c4141f6ff2a75b1bd7ff6d..014144ecf2ee16efda1c33cb0a4002a1be068cb2 100644 (file)
--- a/hw/pass-through.c
+++ b/hw/pass-through.c
@@ -4260,7 +4260,7 @@ static struct pt_dev * register_real_device(PCIBus *e_bus,
     }
 
     /* Bind interrupt */
-    if (!assigned_device->dev.config[0x3d])
+    if (!assigned_device->dev.config[PCI_INTERRUPT_PIN])
         goto out;
 
     if ( PT_MACHINE_IRQ_AUTO == machine_irq )

diff --git a/hw/pci.c b/hw/pci.c
index ffa2c6f852aba22d391ab6ed9dfdf6e4f85765e8..f051de16956bade2d3dfd9bb1828c7c6172034c4 100644 (file)
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -923,16 +923,16 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did,
     pci_config_set_vendor_id(s->dev.config, vid);
     pci_config_set_device_id(s->dev.config, did);
 
-    s->dev.config[0x04] = 0x06; // command = bus master, pci mem
-    s->dev.config[0x05] = 0x00;
-    s->dev.config[0x06] = 0xa0; // status = fast back-to-back, 66MHz, no error
-    s->dev.config[0x07] = 0x00; // status = fast devsel
-    s->dev.config[0x08] = rid;  // revision
-    s->dev.config[0x09] = 0x00; // programming i/f
+    s->dev.config[PCI_COMMAND] = 0x06; // command = bus master, pci mem
+    s->dev.config[PCI_COMMAND + 1] = 0x00;
+    s->dev.config[PCI_STATUS] = 0xa0; // status = fast back-to-back, 66MHz, no error
+    s->dev.config[PCI_STATUS + 1] = 0x00; // status = fast devsel
+    s->dev.config[PCI_REVISION] = rid;
+    s->dev.config[PCI_CLASS_PROG] = 0x00; // programming i/f
     pci_config_set_class(s->dev.config, PCI_CLASS_BRIDGE_PCI);
-    s->dev.config[0x0D] = 0x10; // latency_timer
-    s->dev.config[0x0E] = 0x81; // header_type
-    s->dev.config[0x1E] = 0xa0; // secondary status
+    s->dev.config[PCI_LATENCY_TIMER] = 0x10;
+    s->dev.config[PCI_HEADER_TYPE] = 0x81;
+    s->dev.config[PCI_SEC_STATUS] = 0xa0;
 
     s->bus = pci_register_secondary_bus(&s->dev, map_irq);
     return s->bus;

diff --git a/hw/pci.h b/hw/pci.h
index f232bbe02b161d6ec6964bb1fd977276fe65d61b..e4cc79adf66b64321850a10f9ab8d35b41c8b10d 100644 (file)
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -156,8 +156,13 @@ typedef struct PCIIORegion {
 #define PCI_COMMAND            0x04    /* 16 bits */
 #define  PCI_COMMAND_IO                0x1     /* Enable response in I/O space */
 #define  PCI_COMMAND_MEMORY    0x2     /* Enable response in Memory space */
-#define PCI_REVISION            0x08
-#define PCI_CLASS_DEVICE        0x0a    /* Device class */
+#define PCI_STATUS             0x06    /* 16 bits */
+#define PCI_REVISION           0x08    /* 8 bits */
+#define PCI_CLASS_PROG         0x09
+#define PCI_CLASS_DEVICE       0x0a    /* Device class */
+#define PCI_CACHE_LINE_SIZE    0x0c    /* 8 bits */
+#define PCI_LATENCY_TIMER      0x0d    /* 8 bits */
+#define PCI_HEADER_TYPE                0x0e    /* 8 bits */
 #define PCI_SUBVENDOR_ID       0x2c    /* 16 bits */
 #define PCI_SUBDEVICE_ID       0x2e    /* 16 bits */
 #define PCI_INTERRUPT_LINE     0x3c    /* 8 bits */
@@ -165,6 +170,9 @@ typedef struct PCIIORegion {
 #define PCI_MIN_GNT            0x3e    /* 8 bits */
 #define PCI_MAX_LAT            0x3f    /* 8 bits */
 
+/* Header type 1 (PCI-to-PCI bridges) */
+#define PCI_SEC_STATUS         0x1e    /* Secondary status register */
+
 /* Bits in the PCI Status Register (PCI 2.3 spec) */
 #define PCI_STATUS_RESERVED1   0x007
 #define PCI_STATUS_INT_STATUS  0x008

diff --git a/hw/usb-ohci.c b/hw/usb-ohci.c
index 6ddc2aae7e13c282e0937a4b59ba9b5cd7886eb9..07e103cd1a2dead8d238dd400806eaad009fa806 100644 (file)
--- a/hw/usb-ohci.c
+++ b/hw/usb-ohci.c
@@ -1681,9 +1681,9 @@ void usb_ohci_init_pci(struct PCIBus *bus, int num_ports, int devfn)
 
     pci_config_set_vendor_id(ohci->pci_dev.config, PCI_VENDOR_ID_APPLE);
     pci_config_set_device_id(ohci->pci_dev.config, 0x003f); // device_id
-    ohci->pci_dev.config[0x09] = 0x10; /* OHCI */
+    ohci->pci_dev.config[PCI_CLASS_PROG] = 0x10; /* OHCI */
     pci_config_set_class(ohci->pci_dev.config, PCI_CLASS_SERIAL_USB);
-    ohci->pci_dev.config[0x3d] = 0x01; /* interrupt pin 1 */
+    ohci->pci_dev.config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin 1 */
 
     usb_ohci_init(&ohci->state, num_ports, devfn, ohci->pci_dev.irq[0],
                   OHCI_TYPE_PCI, ohci->pci_dev.name);