if ((op_code & table[i].mask) == table[i].value) {
/* possible match */
conditional_function cond = table[i].condition;
- if ((cond == 0) || (this->*cond)(op_code)) {
+ if ((cond == NULL) || cond(op_code)) {
try
{
if (table[i].type == pool) {
-bool NMD::ADDIU_32__cond(uint64 instruction)
+static bool ADDIU_32__cond(uint64 instruction)
{
uint64 rt = extract_rt_25_24_23_22_21(instruction);
return rt != 0;
}
-bool NMD::ADDIU_RS5__cond(uint64 instruction)
+static bool ADDIU_RS5__cond(uint64 instruction)
{
uint64 rt = extract_rt_9_8_7_6_5(instruction);
return rt != 0;
}
-bool NMD::BALRSC_cond(uint64 instruction)
+static bool BALRSC_cond(uint64 instruction)
{
uint64 rt = extract_rt_25_24_23_22_21(instruction);
return rt != 0;
}
-bool NMD::BEQC_16__cond(uint64 instruction)
+static bool BEQC_16__cond(uint64 instruction)
{
uint64 rs3 = extract_rs3_6_5_4(instruction);
uint64 rt3 = extract_rt3_9_8_7(instruction);
}
-bool NMD::BNEC_16__cond(uint64 instruction)
+static bool BNEC_16__cond(uint64 instruction)
{
uint64 rs3 = extract_rs3_6_5_4(instruction);
uint64 rt3 = extract_rt3_9_8_7(instruction);
}
-bool NMD::MOVE_cond(uint64 instruction)
+static bool MOVE_cond(uint64 instruction)
{
uint64 rt = extract_rt_9_8_7_6_5(instruction);
return rt != 0;
}
-bool NMD::P16_BR1_cond(uint64 instruction)
+static bool P16_BR1_cond(uint64 instruction)
{
uint64 u = extract_u_3_2_1_0__s1(instruction);
return u != 0;
}
-bool NMD::PREF_S9__cond(uint64 instruction)
+static bool PREF_S9__cond(uint64 instruction)
{
uint64 hint = extract_hint_25_24_23_22_21(instruction);
return hint != 31;
}
-bool NMD::PREFE_cond(uint64 instruction)
+static bool PREFE_cond(uint64 instruction)
{
uint64 hint = extract_hint_25_24_23_22_21(instruction);
return hint != 31;
}
-bool NMD::SLTU_cond(uint64 instruction)
+static bool SLTU_cond(uint64 instruction)
{
uint64 rd = extract_rd_15_14_13_12_11(instruction);
return rd != 0;
0xffe00000, 0x00000000, 0 , 0,
0x0 }, /* P.RI */
{ instruction , 0 , 0 , 32,
- 0xfc000000, 0x00000000, &NMD::ADDIU_32_ , &NMD::ADDIU_32__cond ,
+ 0xfc000000, 0x00000000, &NMD::ADDIU_32_ , &ADDIU_32__cond ,
0x0 }, /* ADDIU[32] */
};
0xfc00fbff, 0x20000390, 0 , 0,
0x0 }, /* P.DVP */
{ instruction , 0 , 0 , 32,
- 0xfc0003ff, 0x20000390, &NMD::SLTU , &NMD::SLTU_cond ,
+ 0xfc0003ff, 0x20000390, &NMD::SLTU , &SLTU_cond ,
0x0 }, /* SLTU */
};
0xffe07f00, 0xa7e01800, &NMD::SYNCI , 0,
0x0 }, /* SYNCI */
{ instruction , 0 , 0 , 32,
- 0xfc007f00, 0xa4001800, &NMD::PREF_S9_ , &NMD::PREF_S9__cond ,
+ 0xfc007f00, 0xa4001800, &NMD::PREF_S9_ , &PREF_S9__cond ,
0x0 }, /* PREF[S9] */
};
0xffe07f00, 0xa7e01a00, &NMD::SYNCIE , 0,
CP0_ | EVA_ }, /* SYNCIE */
{ instruction , 0 , 0 , 32,
- 0xfc007f00, 0xa4001a00, &NMD::PREFE , &NMD::PREFE_cond ,
+ 0xfc007f00, 0xa4001a00, &NMD::PREFE , &PREFE_cond ,
CP0_ | EVA_ }, /* PREFE */
};
0xffe0f000, 0x48008000, &NMD::BRSC , 0,
0x0 }, /* BRSC */
{ call_instruction , 0 , 0 , 32,
- 0xfc00f000, 0x48008000, &NMD::BALRSC , &NMD::BALRSC_cond ,
+ 0xfc00f000, 0x48008000, &NMD::BALRSC , &BALRSC_cond ,
0x0 }, /* BALRSC */
};
0xffe0 , 0x1000 , 0 , 0,
0x0 }, /* P16.RI */
{ instruction , 0 , 0 , 16,
- 0xfc00 , 0x1000 , &NMD::MOVE , &NMD::MOVE_cond ,
+ 0xfc00 , 0x1000 , &NMD::MOVE , &MOVE_cond ,
0x0 }, /* MOVE */
};
0xffe8 , 0x9008 , &NMD::NOP_16_ , 0,
0x0 }, /* NOP[16] */
{ instruction , 0 , 0 , 16,
- 0xfc08 , 0x9008 , &NMD::ADDIU_RS5_ , &NMD::ADDIU_RS5__cond ,
+ 0xfc08 , 0x9008 , &NMD::ADDIU_RS5_ , &ADDIU_RS5__cond ,
0x0 }, /* ADDIU[RS5] */
};
NMD::Pool NMD::P16_BR1[2] = {
{ branch_instruction , 0 , 0 , 16,
- 0xfc00 , 0xd800 , &NMD::BEQC_16_ , &NMD::BEQC_16__cond ,
+ 0xfc00 , 0xd800 , &NMD::BEQC_16_ , &BEQC_16__cond ,
XMMS_ }, /* BEQC[16] */
{ branch_instruction , 0 , 0 , 16,
- 0xfc00 , 0xd800 , &NMD::BNEC_16_ , &NMD::BNEC_16__cond ,
+ 0xfc00 , 0xd800 , &NMD::BNEC_16_ , &BNEC_16__cond ,
XMMS_ }, /* BNEC[16] */
};
0xfc0f , 0xd800 , 0 , 0,
0x0 }, /* P16.JRC */
{ pool , P16_BR1 , 2 , 16,
- 0xfc00 , 0xd800 , 0 , &NMD::P16_BR1_cond ,
+ 0xfc00 , 0xd800 , 0 , &P16_BR1_cond ,
0x0 }, /* P16.BR1 */
};