]> xenbits.xensource.com Git - xen.git/commitdiff
libxc: X86: expose RDSEED, ADX, and PREFETCHW to pv/hvm
authorLiu Jinsong <jinsong.liu@intel.com>
Thu, 13 Feb 2014 13:05:01 +0000 (21:05 +0800)
committerIan Campbell <ian.campbell@citrix.com>
Tue, 8 Apr 2014 14:41:42 +0000 (15:41 +0100)
Intel recently released some new features, including RDSEED, ADX, and
PREFETCHW.  This patch exposes these new features to pv and hvm.

Signed-off-by: Xudong Hao <xudong.hao@intel.com>
Signed-off-by: Liu Jinsong <jinsong.liu@intel.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
tools/libxc/xc_cpufeature.h
tools/libxc/xc_cpuid_x86.c

index c464e3a84b0754684528f3bba240a7f4560c85df..09b2c82a3c6961e3906574611cf8b042489d3dc4 100644 (file)
 #define X86_FEATURE_ERMS         9 /* Enhanced REP MOVSB/STOSB */
 #define X86_FEATURE_INVPCID     10 /* Invalidate Process Context ID */
 #define X86_FEATURE_RTM         11 /* Restricted Transactional Memory */
+#define X86_FEATURE_RDSEED      18 /* RDSEED instruction */
+#define X86_FEATURE_ADX         19 /* ADCX, ADOX instructions */
+
 
 #endif /* __LIBXC_CPUFEATURE_H */
index bbbf9b80ebcdeb0e29f97f5012b8edd66545a95e..92640393c06a872370839d96f8e0f1748f4cea7a 100644 (file)
@@ -197,6 +197,7 @@ static void intel_xc_cpuid_policy(
 
         /* Only a few features are advertised in Intel's 0x80000001. */
         regs[2] &= (is_64bit ? bitmaskof(X86_FEATURE_LAHF_LM) : 0) |
+                               bitmaskof(X86_FEATURE_3DNOWPREFETCH) |
                                bitmaskof(X86_FEATURE_ABM);
         regs[3] &= ((is_pae ? bitmaskof(X86_FEATURE_NX) : 0) |
                     (is_64bit ? bitmaskof(X86_FEATURE_LM) : 0) |
@@ -371,6 +372,8 @@ static void xc_cpuid_hvm_policy(
                         bitmaskof(X86_FEATURE_ERMS) |
                         bitmaskof(X86_FEATURE_INVPCID) |
                         bitmaskof(X86_FEATURE_RTM)  |
+                        bitmaskof(X86_FEATURE_RDSEED)  |
+                        bitmaskof(X86_FEATURE_ADX)  |
                         bitmaskof(X86_FEATURE_FSGSBASE));
         } else
             regs[1] = 0;
@@ -502,6 +505,8 @@ static void xc_cpuid_pv_policy(
                         bitmaskof(X86_FEATURE_BMI2) |
                         bitmaskof(X86_FEATURE_ERMS) |
                         bitmaskof(X86_FEATURE_RTM)  |
+                        bitmaskof(X86_FEATURE_RDSEED)  |
+                        bitmaskof(X86_FEATURE_ADX)  |
                         bitmaskof(X86_FEATURE_FSGSBASE));
         else
             regs[1] = 0;