return;
WRITE_SYSREG64(p2m->vttbr, VTTBR_EL2);
- isb();
-
WRITE_SYSREG(n->arch.sctlr, SCTLR_EL1);
- isb();
-
WRITE_SYSREG(n->arch.hcr_el2, HCR_EL2);
- isb();
last_vcpu_ran = &p2m->last_vcpu_ran[smp_processor_id()];
+ /*
+ * While we are restoring an out-of-context translation regime
+ * we still need to ensure:
+ * - VTTBR_EL2 is synchronized before flushing the TLBs
+ * - All registers for EL1 are synchronized before executing an AT
+ * instructions targeting S1/S2.
+ */
+ isb();
+
/*
* Flush local TLB for the domain to prevent wrong TLB translation
* when running multiple vCPU of the same domain on a single pCPU.
{
local_irq_save(flags);
WRITE_SYSREG64(p2m->vttbr, VTTBR_EL2);
+ /* Ensure VTTBR_EL2 is synchronized before flushing the TLBs */
isb();
}
if ( ovttbr != READ_SYSREG64(VTTBR_EL2) )
{
WRITE_SYSREG64(ovttbr, VTTBR_EL2);
+ /* Ensure VTTBR_EL2 is back in place before continuing. */
isb();
local_irq_restore(flags);
}
static void setup_virt_paging_one(void *data)
{
WRITE_SYSREG32(vtcr, VTCR_EL2);
- isb();
}
void __init setup_virt_paging(void)