SUPPORT.MD: Clarify the support state for the Arm SMMUv{1, 2} drivers

SMMUv{1, 2} are both marked as security supported, so we would
technically have to issue an XSA for any IOMMU security bug.

However, at the moment, device passthrough is not security supported
on Arm and there is no plan to change that in the next few months.

Therefore, mark Arm SMMUv{1, 2} as supported but not security supported.

Signed-off-by: Julien Grall <jgrall@amazon.com>
Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
(cherry picked from commit 28804c0ce9fde36feec04ad7f57b2683875da8a0)

diff --git a/SUPPORT.md b/SUPPORT.md
index b4038974f9d14d685d2a8aea6f09e49fe40d8134..79ebd51fb832a2ff3283981618d63f53e75308ba 100644 (file)
--- a/SUPPORT.md
+++ b/SUPPORT.md
@@ -62,8 +62,8 @@ supported in this document.
 
     Status, AMD IOMMU: Supported
     Status, Intel VT-d: Supported
-    Status, ARM SMMUv1: Supported
-    Status, ARM SMMUv2: Supported
+    Status, ARM SMMUv1: Supported, not security supported
+    Status, ARM SMMUv2: Supported, not security supported
 
 ### ARM/GICv3 ITS