b trap_hypervisor_call /* 0x08 - Hypervisor Call */
b trap_prefetch_abort /* 0x0c - Prefetch Abort */
b trap_data_abort /* 0x10 - Data Abort */
- b trap_hypervisor /* 0x14 - Hypervisor */
+ b trap_guest_sync /* 0x14 - Hypervisor */
b trap_irq /* 0x18 - IRQ */
b trap_fiq /* 0x1c - FIQ */
DEFINE_TRAP_ENTRY(undefined_instruction)
DEFINE_TRAP_ENTRY(hypervisor_call)
DEFINE_TRAP_ENTRY(prefetch_abort)
-DEFINE_TRAP_ENTRY(hypervisor)
+DEFINE_TRAP_ENTRY(guest_sync)
DEFINE_TRAP_ENTRY_NOIRQ(irq)
DEFINE_TRAP_ENTRY_NOIRQ(fiq)
DEFINE_TRAP_ENTRY_NOABORT(data_abort)
entry hyp=1
msr daifclr, #6
mov x0, sp
- bl do_trap_hypervisor
+ bl do_trap_hyp_sync
exit hyp=1
hyp_irq:
SKIP_SYNCHRONIZE_SERROR_ENTRY_EXIT)
msr daifclr, #6
mov x0, sp
- bl do_trap_hypervisor
+ bl do_trap_guest_sync
1:
exit hyp=0, compat=0
SKIP_SYNCHRONIZE_SERROR_ENTRY_EXIT)
msr daifclr, #6
mov x0, sp
- bl do_trap_hypervisor
+ bl do_trap_guest_sync
1:
exit hyp=0, compat=1
}
}
-asmlinkage void do_trap_hypervisor(struct cpu_user_regs *regs)
+asmlinkage void do_trap_guest_sync(struct cpu_user_regs *regs)
{
const union hsr hsr = { .bits = regs->hsr };
do_trap_data_abort_guest(regs, hsr);
break;
+ default:
+ printk("Unknown Guest Trap. HSR=0x%x EC=0x%x IL=%x Syndrome=0x%"PRIx32"\n",
+ hsr.bits, hsr.ec, hsr.len, hsr.iss);
+ do_unexpected_trap("Guest", regs);
+ }
+}
+
+asmlinkage void do_trap_hyp_sync(struct cpu_user_regs *regs)
+{
+ const union hsr hsr = { .bits = regs->hsr };
+
+ enter_hypervisor_head(regs);
+
+ switch ( hsr.ec )
+ {
#ifdef CONFIG_ARM_64
case HSR_EC_BRK:
do_trap_brk(regs, hsr);