]> xenbits.xensource.com Git - people/royger/xen.git/commitdiff
x86/monitor: add masking support for write_ctrlreg events
authorPetre Pircalabu <ppircalabu@bitdefender.com>
Tue, 20 Jun 2017 15:13:20 +0000 (17:13 +0200)
committerJan Beulich <jbeulich@suse.com>
Tue, 20 Jun 2017 15:13:20 +0000 (17:13 +0200)
Add support for filtering out the write_ctrlreg monitor events if they
are generated only by changing certains bits.
A new parameter (bitmask) was added to the xc_monitor_write_ctrlreg
function in order to mask the event generation if the changed bits are
set.

Signed-off-by: Petre Pircalabu <ppircalabu@bitdefender.com>
Acked-by: Tamas K Lengyel <tamas@tklengyel.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
tools/libxc/include/xenctrl.h
tools/libxc/xc_monitor.c
xen/arch/x86/hvm/monitor.c
xen/arch/x86/monitor.c
xen/include/asm-x86/domain.h
xen/include/public/domctl.h

index 1629f412dd02d42613d226893774e48f1e21c52a..8c26cb4141fe22b6037c9a7745bc86b879c64a9b 100644 (file)
@@ -1999,7 +1999,7 @@ int xc_monitor_get_capabilities(xc_interface *xch, domid_t domain_id,
                                 uint32_t *capabilities);
 int xc_monitor_write_ctrlreg(xc_interface *xch, domid_t domain_id,
                              uint16_t index, bool enable, bool sync,
-                             bool onchangeonly);
+                             uint64_t bitmask, bool onchangeonly);
 /*
  * A list of MSR indices can usually be found in /usr/include/asm/msr-index.h.
  * Please consult the Intel/AMD manuals for more information on
index f99b6e3a33842613ffc70e46e42aa689b3157e2a..b44ce93be71ebfe130d1be46dbed305e337f1804 100644 (file)
@@ -70,7 +70,7 @@ int xc_monitor_get_capabilities(xc_interface *xch, domid_t domain_id,
 
 int xc_monitor_write_ctrlreg(xc_interface *xch, domid_t domain_id,
                              uint16_t index, bool enable, bool sync,
-                             bool onchangeonly)
+                             uint64_t bitmask, bool onchangeonly)
 {
     DECLARE_DOMCTL;
 
@@ -82,6 +82,9 @@ int xc_monitor_write_ctrlreg(xc_interface *xch, domid_t domain_id,
     domctl.u.monitor_op.u.mov_to_cr.index = index;
     domctl.u.monitor_op.u.mov_to_cr.sync = sync;
     domctl.u.monitor_op.u.mov_to_cr.onchangeonly = onchangeonly;
+    domctl.u.monitor_op.u.mov_to_cr.bitmask = bitmask;
+    domctl.u.monitor_op.u.mov_to_cr.pad1 = 0;
+    domctl.u.monitor_op.u.mov_to_cr.pad2 = 0;
 
     return do_domctl(xch, &domctl);
 }
index bde5fd03f0a48650adf479a94bb5aa7b2913f11b..a7ccfc4b429161f768b65f9cc703d2472b8fa71d 100644 (file)
@@ -38,7 +38,8 @@ bool_t hvm_monitor_cr(unsigned int index, unsigned long value, unsigned long old
 
     if ( (ad->monitor.write_ctrlreg_enabled & ctrlreg_bitmask) &&
          (!(ad->monitor.write_ctrlreg_onchangeonly & ctrlreg_bitmask) ||
-          value != old) )
+          value != old) &&
+         (!((value ^ old) & ad->monitor.write_ctrlreg_mask[index])) )
     {
         bool_t sync = !!(ad->monitor.write_ctrlreg_sync & ctrlreg_bitmask);
 
index 449c64cc4df17cf675928e821c5f28f0a3e65dce..bedf13c74dbc6aa399def0f02ce03cf78ac52e50 100644 (file)
@@ -136,6 +136,9 @@ int arch_monitor_domctl_event(struct domain *d,
         if ( unlikely(mop->u.mov_to_cr.index > 31) )
             return -EINVAL;
 
+        if ( unlikely(mop->u.mov_to_cr.pad1 || mop->u.mov_to_cr.pad2) )
+            return -EINVAL;
+
         ctrlreg_bitmask = monitor_ctrlreg_bitmask(mop->u.mov_to_cr.index);
         old_status = !!(ad->monitor.write_ctrlreg_enabled & ctrlreg_bitmask);
 
@@ -155,9 +158,15 @@ int arch_monitor_domctl_event(struct domain *d,
             ad->monitor.write_ctrlreg_onchangeonly &= ~ctrlreg_bitmask;
 
         if ( requested_status )
+        {
+            ad->monitor.write_ctrlreg_mask[mop->u.mov_to_cr.index] = mop->u.mov_to_cr.bitmask;
             ad->monitor.write_ctrlreg_enabled |= ctrlreg_bitmask;
+        }
         else
+        {
+            ad->monitor.write_ctrlreg_mask[mop->u.mov_to_cr.index] = 0;
             ad->monitor.write_ctrlreg_enabled &= ~ctrlreg_bitmask;
+        }
 
         if ( VM_EVENT_X86_CR3 == mop->u.mov_to_cr.index )
         {
index 924caac834374ef49caaeeb0f9af7881f4d97ef1..27d80eeff446d01c7ea2760240f31ac2ae50cdaa 100644 (file)
@@ -406,6 +406,7 @@ struct arch_domain
         unsigned int cpuid_enabled               : 1;
         unsigned int descriptor_access_enabled   : 1;
         struct monitor_msr_bitmap *msr_bitmap;
+        uint64_t write_ctrlreg_mask[4];
     } monitor;
 
     /* Mem_access emulation control */
index f7cbc0afcd659434567e183cfd446a5617a823a4..ff3976216b81289e0819e67049d87add6df6ecb7 100644 (file)
@@ -1107,6 +1107,14 @@ struct xen_domctl_monitor_op {
             uint8_t sync;
             /* Send event only on a change of value */
             uint8_t onchangeonly;
+            /* Allignment padding */
+            uint8_t pad1;
+            uint32_t pad2;
+            /*
+             * Send event only if the changed bit in the control register
+             * is not masked.
+             */
+            uint64_aligned_t bitmask;
         } mov_to_cr;
 
         struct {