uint32_t *capabilities);
int xc_monitor_write_ctrlreg(xc_interface *xch, domid_t domain_id,
uint16_t index, bool enable, bool sync,
- bool onchangeonly);
+ uint64_t bitmask, bool onchangeonly);
/*
* A list of MSR indices can usually be found in /usr/include/asm/msr-index.h.
* Please consult the Intel/AMD manuals for more information on
int xc_monitor_write_ctrlreg(xc_interface *xch, domid_t domain_id,
uint16_t index, bool enable, bool sync,
- bool onchangeonly)
+ uint64_t bitmask, bool onchangeonly)
{
DECLARE_DOMCTL;
domctl.u.monitor_op.u.mov_to_cr.index = index;
domctl.u.monitor_op.u.mov_to_cr.sync = sync;
domctl.u.monitor_op.u.mov_to_cr.onchangeonly = onchangeonly;
+ domctl.u.monitor_op.u.mov_to_cr.bitmask = bitmask;
+ domctl.u.monitor_op.u.mov_to_cr.pad1 = 0;
+ domctl.u.monitor_op.u.mov_to_cr.pad2 = 0;
return do_domctl(xch, &domctl);
}
if ( (ad->monitor.write_ctrlreg_enabled & ctrlreg_bitmask) &&
(!(ad->monitor.write_ctrlreg_onchangeonly & ctrlreg_bitmask) ||
- value != old) )
+ value != old) &&
+ (!((value ^ old) & ad->monitor.write_ctrlreg_mask[index])) )
{
bool_t sync = !!(ad->monitor.write_ctrlreg_sync & ctrlreg_bitmask);
if ( unlikely(mop->u.mov_to_cr.index > 31) )
return -EINVAL;
+ if ( unlikely(mop->u.mov_to_cr.pad1 || mop->u.mov_to_cr.pad2) )
+ return -EINVAL;
+
ctrlreg_bitmask = monitor_ctrlreg_bitmask(mop->u.mov_to_cr.index);
old_status = !!(ad->monitor.write_ctrlreg_enabled & ctrlreg_bitmask);
ad->monitor.write_ctrlreg_onchangeonly &= ~ctrlreg_bitmask;
if ( requested_status )
+ {
+ ad->monitor.write_ctrlreg_mask[mop->u.mov_to_cr.index] = mop->u.mov_to_cr.bitmask;
ad->monitor.write_ctrlreg_enabled |= ctrlreg_bitmask;
+ }
else
+ {
+ ad->monitor.write_ctrlreg_mask[mop->u.mov_to_cr.index] = 0;
ad->monitor.write_ctrlreg_enabled &= ~ctrlreg_bitmask;
+ }
if ( VM_EVENT_X86_CR3 == mop->u.mov_to_cr.index )
{
unsigned int cpuid_enabled : 1;
unsigned int descriptor_access_enabled : 1;
struct monitor_msr_bitmap *msr_bitmap;
+ uint64_t write_ctrlreg_mask[4];
} monitor;
/* Mem_access emulation control */
uint8_t sync;
/* Send event only on a change of value */
uint8_t onchangeonly;
+ /* Allignment padding */
+ uint8_t pad1;
+ uint32_t pad2;
+ /*
+ * Send event only if the changed bit in the control register
+ * is not masked.
+ */
+ uint64_aligned_t bitmask;
} mov_to_cr;
struct {