UINTN BitStart;\r
UINTN Index;\r
IA32_PAGING_ENTRY *PagingEntry;\r
+ UINTN PagingEntryIndex;\r
IA32_PAGING_ENTRY *CurrentPagingEntry;\r
UINT64 RegionLength;\r
UINT64 SubLength;\r
LocalParentAttribute.Uint64 = ParentAttribute->Uint64;\r
ParentAttribute = &LocalParentAttribute;\r
\r
+ //\r
+ // RegionLength: 256T (1 << 48) 512G (1 << 39), 1G (1 << 30), 2M (1 << 21) or 4K (1 << 12).\r
+ //\r
+ BitStart = 12 + (Level - 1) * 9;\r
+ PagingEntryIndex = (UINTN)BitFieldRead64 (LinearAddress + Offset, BitStart, BitStart + 9 - 1);\r
+ RegionLength = REGION_LENGTH (Level);\r
+ RegionMask = RegionLength - 1;\r
+\r
//\r
// ParentPagingEntry ONLY is deferenced for checking Present and MustBeOne bits\r
// when Modify is FALSE.\r
//\r
PageTableLibSetPnle (&ParentPagingEntry->Pnle, &NopAttribute, &AllOneMask);\r
\r
- RegionLength = REGION_LENGTH (Level);\r
- PagingEntry = (IA32_PAGING_ENTRY *)(UINTN)IA32_PNLE_PAGE_TABLE_BASE_ADDRESS (&ParentPagingEntry->Pnle);\r
+ PagingEntry = (IA32_PAGING_ENTRY *)(UINTN)IA32_PNLE_PAGE_TABLE_BASE_ADDRESS (&ParentPagingEntry->Pnle);\r
for (SubOffset = 0, Index = 0; Index < 512; Index++) {\r
PagingEntry[Index].Uint64 = OneOfPagingEntry.Uint64 + SubOffset;\r
SubOffset += RegionLength;\r
}\r
\r
//\r
- // RegionLength: 256T (1 << 48) 512G (1 << 39), 1G (1 << 30), 2M (1 << 21) or 4K (1 << 12).\r
// RegionStart: points to the linear address that's aligned on RegionLength and lower than (LinearAddress + Offset).\r
//\r
- BitStart = 12 + (Level - 1) * 9;\r
- Index = (UINTN)BitFieldRead64 (LinearAddress + Offset, BitStart, BitStart + 9 - 1);\r
- RegionLength = LShiftU64 (1, BitStart);\r
- RegionMask = RegionLength - 1;\r
- RegionStart = (LinearAddress + Offset) & ~RegionMask;\r
-\r
+ Index = PagingEntryIndex;\r
+ RegionStart = (LinearAddress + Offset) & ~RegionMask;\r
ParentAttribute->Uint64 = PageTableLibGetPnleMapAttribute (&ParentPagingEntry->Pnle, ParentAttribute);\r
\r
//\r