]> xenbits.xensource.com Git - xen.git/commitdiff
VMX: fix DebugCtl MSR clearing
authorJan Beulich <jbeulich@suse.com>
Wed, 1 Oct 2014 13:01:57 +0000 (15:01 +0200)
committerJan Beulich <jbeulich@suse.com>
Wed, 1 Oct 2014 13:01:57 +0000 (15:01 +0200)
The previous shortcut was wrong, as it bypassed the necessary vmwrite:
All we really want to avoid if the guest writes zero is to add the MSR
to the host-load list.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
master commit: dfa625e15f3d6c374637f2bb789e1f444c2781c3
master date: 2014-08-22 14:29:37 +0200

xen/arch/x86/hvm/vmx/vmx.c

index 2cd4c59c53e782355e5cc41ec60e55c9196dcea1..678cc59574706a5fb2083f058f8c55e96b1462c5 100644 (file)
@@ -2170,8 +2170,6 @@ static int vmx_msr_write_intercept(unsigned int msr, uint64_t msr_content)
         int i, rc = 0;
         uint64_t supported = IA32_DEBUGCTLMSR_LBR | IA32_DEBUGCTLMSR_BTF;
 
-        if ( !msr_content )
-            break;
         if ( msr_content & ~supported )
         {
             /* Perhaps some other bits are supported in vpmu. */
@@ -2191,12 +2189,10 @@ static int vmx_msr_write_intercept(unsigned int msr, uint64_t msr_content)
         }
 
         if ( (rc < 0) ||
-             (vmx_add_host_load_msr(msr) < 0) )
+             (msr_content && (vmx_add_host_load_msr(msr) < 0)) )
             hvm_inject_hw_exception(TRAP_machine_check, 0);
         else
-        {
             __vmwrite(GUEST_IA32_DEBUGCTL, msr_content);
-        }
 
         break;
     }