cpu: Remove the verification conditions of the model in the x86 signatures

The x86ModelParseSignatures function makes an assumption that CPU signature
model equals 0 as an invalid case. While in Hygon processor definition, A1
version (model 0, stepping 1) is mass production version, to support Hygon
Dhyana A1 version, we have removed CPU signature model zero checking condition.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Yingle Hou <houyingle@hygon.cn>

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 1e913cc9fa1828c790c315b9ffdc9d0b80c24e1b..9b7981d574b29a38fdd8aeb028ce54bd2e4b4d0d 100644 (file)
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -1418,7 +1418,7 @@ x86ModelParseSignatures(virCPUx86ModelPtr model,
         }
 
         rc = virXPathUInt("string(@model)", ctxt, &sigModel);
-        if (rc < 0 || sigModel == 0) {
+        if (rc < 0) {
             virReportError(VIR_ERR_INTERNAL_ERROR,
                            _("Invalid CPU signature model in model %s"),
                            model->name);