if ( guest_mode )
{
- if ( psr_mode_is_32bit(regs) )
+ if ( regs_mode_is_32bit(regs) )
show_registers_32(regs, ctxt, guest_mode, v);
#ifdef CONFIG_ARM_64
else
{
unsigned long it;
- BUG_ON( !psr_mode_is_32bit(regs) || !(cpsr & PSR_THUMB) );
+ BUG_ON( !regs_mode_is_32bit(regs) || !(cpsr & PSR_THUMB) );
it = ( (cpsr >> (10-2)) & 0xfc) | ((cpsr >> 25) & 0x3 );
void advance_pc(struct cpu_user_regs *regs, const union hsr hsr)
{
register_t itbits, cond, cpsr = regs->cpsr;
- bool is_thumb = psr_mode_is_32bit(regs) && (cpsr & PSR_THUMB);
+ bool is_thumb = regs_mode_is_32bit(regs) && (cpsr & PSR_THUMB);
if ( is_thumb && (cpsr & PSR_IT_MASK) )
{
advance_pc(regs, hsr);
break;
case HSR_EC_CP15_32:
- GUEST_BUG_ON(!psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(!regs_mode_is_32bit(regs));
perfc_incr(trap_cp15_32);
do_cp15_32(regs, hsr);
break;
case HSR_EC_CP15_64:
- GUEST_BUG_ON(!psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(!regs_mode_is_32bit(regs));
perfc_incr(trap_cp15_64);
do_cp15_64(regs, hsr);
break;
case HSR_EC_CP14_32:
- GUEST_BUG_ON(!psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(!regs_mode_is_32bit(regs));
perfc_incr(trap_cp14_32);
do_cp14_32(regs, hsr);
break;
case HSR_EC_CP14_64:
- GUEST_BUG_ON(!psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(!regs_mode_is_32bit(regs));
perfc_incr(trap_cp14_64);
do_cp14_64(regs, hsr);
break;
case HSR_EC_CP14_DBG:
- GUEST_BUG_ON(!psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(!regs_mode_is_32bit(regs));
perfc_incr(trap_cp14_dbg);
do_cp14_dbg(regs, hsr);
break;
case HSR_EC_CP10:
- GUEST_BUG_ON(!psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(!regs_mode_is_32bit(regs));
perfc_incr(trap_cp10);
do_cp10(regs, hsr);
break;
case HSR_EC_CP:
- GUEST_BUG_ON(!psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(!regs_mode_is_32bit(regs));
perfc_incr(trap_cp);
do_cp(regs, hsr);
break;
* ARMv7 (DDI 0406C.b): B1.14.8
* ARMv8 (DDI 0487A.d): D1-1501 Table D1-44
*/
- GUEST_BUG_ON(!psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(!regs_mode_is_32bit(regs));
perfc_incr(trap_smc32);
do_trap_smc(regs, hsr);
break;
{
register_t nr;
- GUEST_BUG_ON(!psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(!regs_mode_is_32bit(regs));
perfc_incr(trap_hvc32);
#ifndef NDEBUG
if ( (hsr.iss & 0xff00) == 0xff00 )
}
#ifdef CONFIG_ARM_64
case HSR_EC_HVC64:
- GUEST_BUG_ON(psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(regs_mode_is_32bit(regs));
perfc_incr(trap_hvc64);
#ifndef NDEBUG
if ( (hsr.iss & 0xff00) == 0xff00 )
*
* ARMv8 (DDI 0487A.d): D1-1501 Table D1-44
*/
- GUEST_BUG_ON(psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(regs_mode_is_32bit(regs));
perfc_incr(trap_smc64);
do_trap_smc(regs, hsr);
break;
case HSR_EC_SYSREG:
- GUEST_BUG_ON(psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(regs_mode_is_32bit(regs));
perfc_incr(trap_sysreg);
do_sysreg(regs, hsr);
break;