Specify the bit width of the DMA heap.
### dom0 (x86)
-> `= List of [ pvh | shadow ]`
+> `= List of [ pvh | shadow | verbose ]`
> Sub-options:
Flag that makes a dom0 use shadow paging. Only works when "pvh" is
enabled.
+> `verbose`
+
+> Default: `false`
+
+Print debug information during dom0 build.
+
### dom0-iommu
> `= List of [ passthrough | strict | map-inclusive ]`
bool __initdata opt_dom0_shadow;
#endif
bool __initdata dom0_pvh;
+bool __initdata dom0_verbose;
/*
* List of parameters that affect Dom0 creation:
else if ( (val = parse_boolean("shadow", s, ss)) >= 0 )
opt_dom0_shadow = val;
#endif
+ else if ( (val = parse_boolean("verbose", s, ss)) >= 0 )
+ dom0_verbose = val;
else
rc = -EINVAL;
static unsigned int __initdata acpi_nmi_sources;
static struct acpi_madt_nmi_source __initdata *nmisrc;
+static unsigned int __initdata order_stats[MAX_ORDER + 1];
+
+static void __init print_order_stats(const struct domain *d)
+{
+ unsigned int i;
+
+ printk("Dom%u memory allocation stats:\n", d->domain_id);
+ for ( i = 0; i < ARRAY_SIZE(order_stats); i++ )
+ if ( order_stats[i] )
+ printk("order %2u allocations: %u\n", i, order_stats[i]);
+}
+
static int __init modify_identity_mmio(struct domain *d, unsigned long pfn,
unsigned long nr_pages, const bool map)
{
}
start += 1UL << order;
nr_pages -= 1UL << order;
+ order_stats[order]++;
if ( (++i % MAP_MAX_ITER) == 0 )
process_pending_softirqs();
}
return rc;
}
+ if ( dom0_verbose )
+ print_order_stats(d);
+
return 0;
#undef MB1_PAGES
}