early_info.gic.gic_vcpu_addr = start;
}
+static int __init process_chosen_modules_node(const void *fdt, int node,
+ const char *name, int *depth,
+ u32 address_cells, u32 size_cells)
+{
+ const struct fdt_property *prop;
+ const u32 *cell;
+ int nr, nr_modules = 0;
+ struct dt_mb_module *mod;
+ int len;
+
+ for ( *depth = 1;
+ *depth >= 1;
+ node = fdt_next_node(fdt, node, depth) )
+ {
+ name = fdt_get_name(fdt, node, NULL);
+ if ( strncmp(name, "module@", strlen("module@")) == 0 ) {
+
+ if ( fdt_node_check_compatible(fdt, node,
+ "xen,multiboot-module" ) != 0 )
+ early_panic("%s not a compatible module node\n", name);
+
+ if ( fdt_node_check_compatible(fdt, node,
+ "xen,linux-zimage") == 0 )
+ nr = 1;
+ else if ( fdt_node_check_compatible(fdt, node,
+ "xen,linux-initrd") == 0)
+ nr = 2;
+ else
+ early_panic("%s not a known xen multiboot byte\n");
+
+ if ( nr > nr_modules )
+ nr_modules = nr;
+
+ mod = &early_info.modules.module[nr];
+
+ prop = fdt_get_property(fdt, node, "reg", NULL);
+ if ( !prop )
+ early_panic("node %s missing `reg' property\n", name);
+
+ cell = (const u32 *)prop->data;
+ device_tree_get_reg(&cell, address_cells, size_cells,
+ &mod->start, &mod->size);
+
+ prop = fdt_get_property(fdt, node, "bootargs", &len);
+ if ( prop )
+ {
+ if ( len > sizeof(mod->cmdline) )
+ early_panic("module %d command line too long\n", nr);
+
+ safe_strcpy(mod->cmdline, prop->data);
+ }
+ else
+ mod->cmdline[0] = 0;
+ }
+ }
+
+ for ( nr = 1 ; nr < nr_modules ; nr++ )
+ {
+ mod = &early_info.modules.module[nr];
+ if ( !mod->start || !mod->size )
+ early_panic("module %d missing / invalid\n", nr);
+ }
+
+ early_info.modules.nr_mods = nr_modules;
+ return node;
+}
+
+static void __init process_chosen_node(const void *fdt, int node,
+ const char *name,
+ u32 address_cells, u32 size_cells)
+{
+ int depth;
+
+ for ( depth = 0;
+ depth >= 0;
+ node = fdt_next_node(fdt, node, &depth) )
+ {
+ name = fdt_get_name(fdt, node, NULL);
+ if ( depth == 1 && strcmp(name, "modules") == 0 )
+ node = process_chosen_modules_node(fdt, node, name, &depth,
+ address_cells, size_cells);
+ }
+}
+
static int __init early_scan_node(const void *fdt,
int node, const char *name, int depth,
u32 address_cells, u32 size_cells,
process_cpu_node(fdt, node, name, address_cells, size_cells);
else if ( device_tree_node_compatible(fdt, node, "arm,cortex-a15-gic") )
process_gic_node(fdt, node, name, address_cells, size_cells);
+ else if ( device_tree_node_matches(fdt, node, "chosen") )
+ process_chosen_node(fdt, node, name, address_cells, size_cells);
return 0;
}