tools/libxc: Properly increment ApicIdCoreSize field on AMD

Current code incorrectly adds 1 to full register instead of
incrementing the field in bits 15:12.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
(cherry picked from commit a3336a507519c1d28db3bbff8e439aa3811733f3)
(cherry picked from commit de781b47f447fcdd1c556543fcf0ef1d654d2d4d)
(cherry picked from commit 0e944364767cb198ae81c4326ed24ea3941ad8e7)

diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c
index a18b1ff6172c7244410543e2171e48b75214e951..210ac98d768832e6cdbd03fec1c6e590bd037358 100644 (file)
--- a/tools/libxc/xc_cpuid_x86.c
+++ b/tools/libxc/xc_cpuid_x86.c
@@ -123,7 +123,8 @@ static void amd_xc_cpuid_policy(
          * ECX[15:12] is ApicIdCoreSize: ECX[7:0] is NumberOfCores (minus one).
          * Update to reflect vLAPIC_ID = vCPU_ID * 2.
          */
-        regs[2] = ((regs[2] & 0xf000u) + 1) | ((regs[2] & 0xffu) << 1) | 1u;
+        regs[2] = ((regs[2] + (1u << 12)) & 0xf000u) |
+                  ((regs[2] & 0xffu) << 1) | 1u;
         break;
 
     case 0x8000000a: {