shadow_cntrl = __get_vvmcs(nvcpu->nv_vvmcx, VM_EXIT_CONTROLS);
shadow_cntrl &= ~(VM_EXIT_SAVE_DEBUG_CNTRLS
| VM_EXIT_LOAD_HOST_PAT
- | VM_EXIT_LOAD_HOST_EFER);
+ | VM_EXIT_LOAD_HOST_EFER
+ | VM_EXIT_LOAD_PERF_GLOBAL_CTRL);
shadow_cntrl |= host_cntrl;
__vmwrite(VM_EXIT_CONTROLS, shadow_cntrl);
}
struct nestedvcpu *nvcpu = &vcpu_nestedhvm(v);
shadow_cntrl = __get_vvmcs(nvcpu->nv_vvmcx, VM_ENTRY_CONTROLS);
- shadow_cntrl &= ~(VM_ENTRY_LOAD_GUEST_PAT | VM_ENTRY_LOAD_GUEST_EFER);
+ shadow_cntrl &= ~(VM_ENTRY_LOAD_GUEST_PAT
+ | VM_ENTRY_LOAD_GUEST_EFER
+ | VM_ENTRY_LOAD_PERF_GLOBAL_CTRL);
__vmwrite(VM_ENTRY_CONTROLS, shadow_cntrl);
}
GUEST_IA32_DEBUGCTL,
GUEST_PAT,
GUEST_EFER,
+ GUEST_PERF_GLOBAL_CTRL,
/* 32 BITS */
GUEST_ES_LIMIT,
GUEST_CS_LIMIT,
control = __get_vvmcs(vvmcs, VM_ENTRY_CONTROLS);
if ( control & VM_ENTRY_LOAD_GUEST_PAT )
hvm_set_guest_pat(v, __get_vvmcs(vvmcs, GUEST_PAT));
+ if ( control & VM_ENTRY_LOAD_PERF_GLOBAL_CTRL )
+ hvm_msr_write_intercept(MSR_CORE_PERF_GLOBAL_CTRL, __get_vvmcs(vvmcs, GUEST_PERF_GLOBAL_CTRL));
hvm_funcs.set_tsc_offset(v, v->arch.hvm_vcpu.cache_tsc_offset);
control = __get_vvmcs(vvmcs, VM_EXIT_CONTROLS);
if ( control & VM_EXIT_LOAD_HOST_PAT )
hvm_set_guest_pat(v, __get_vvmcs(vvmcs, HOST_PAT));
+ if ( control & VM_EXIT_LOAD_PERF_GLOBAL_CTRL )
+ hvm_msr_write_intercept(MSR_CORE_PERF_GLOBAL_CTRL, __get_vvmcs(vvmcs, HOST_PERF_GLOBAL_CTRL));
hvm_funcs.set_tsc_offset(v, v->arch.hvm_vcpu.cache_tsc_offset);
VM_EXIT_SAVE_GUEST_PAT |
VM_EXIT_LOAD_HOST_PAT |
VM_EXIT_SAVE_GUEST_EFER |
- VM_EXIT_LOAD_HOST_EFER;
+ VM_EXIT_LOAD_HOST_EFER |
+ VM_EXIT_LOAD_PERF_GLOBAL_CTRL;
/* 0-settings */
data = ((data | tmp) << 32) | tmp;
break;
/* bit 0-8, and 12 must be 1 (refer G5 of SDM) */
tmp = 0x11ff;
data = VM_ENTRY_LOAD_GUEST_PAT |
- VM_ENTRY_LOAD_GUEST_EFER;
+ VM_ENTRY_LOAD_GUEST_EFER |
+ VM_ENTRY_LOAD_PERF_GLOBAL_CTRL;
data = ((data | tmp) << 32) | tmp;
break;
#define VM_EXIT_SAVE_DEBUG_CNTRLS 0x00000004
#define VM_EXIT_IA32E_MODE 0x00000200
+#define VM_EXIT_LOAD_PERF_GLOBAL_CTRL 0x00001000
#define VM_EXIT_ACK_INTR_ON_EXIT 0x00008000
#define VM_EXIT_SAVE_GUEST_PAT 0x00040000
#define VM_EXIT_LOAD_HOST_PAT 0x00080000
#define VM_ENTRY_IA32E_MODE 0x00000200
#define VM_ENTRY_SMM 0x00000400
#define VM_ENTRY_DEACT_DUAL_MONITOR 0x00000800
+#define VM_ENTRY_LOAD_PERF_GLOBAL_CTRL 0x00002000
#define VM_ENTRY_LOAD_GUEST_PAT 0x00004000
#define VM_ENTRY_LOAD_GUEST_EFER 0x00008000
extern u32 vmx_vmentry_control;
GUEST_PAT_HIGH = 0x00002805,
GUEST_EFER = 0x00002806,
GUEST_EFER_HIGH = 0x00002807,
+ GUEST_PERF_GLOBAL_CTRL = 0x00002808,
+ GUEST_PERF_GLOBAL_CTRL_HIGH = 0x00002809,
GUEST_PDPTR0 = 0x0000280a,
GUEST_PDPTR0_HIGH = 0x0000280b,
GUEST_PDPTR1 = 0x0000280c,
HOST_PAT_HIGH = 0x00002c01,
HOST_EFER = 0x00002c02,
HOST_EFER_HIGH = 0x00002c03,
+ HOST_PERF_GLOBAL_CTRL = 0x00002c04,
+ HOST_PERF_GLOBAL_CTRL_HIGH = 0x00002c05,
PIN_BASED_VM_EXEC_CONTROL = 0x00004000,
CPU_BASED_VM_EXEC_CONTROL = 0x00004002,
EXCEPTION_BITMAP = 0x00004004,