The SL0 attribute in TTBCR, which specifies the entry level in the page
table lookup, should be the same as the SL0 attribute in VTCR_EL2, given
that pagetables are shared between MMU and SMMU.
Make it so, by reading the value from VTCR_EL2, and setting reg
accordingly.
Signed-off-by: Stefano Stabellini <stefanos@xilinx.com>
Tested-by: Upender Cherukupally <upender@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
(TTBCR_RGN_WBWA << TTBCR_ORGN0_SHIFT) |
(TTBCR_RGN_WBWA << TTBCR_IRGN0_SHIFT);
- if (!stage1)
- reg |= (TTBCR_SL0_LVL_1 << TTBCR_SL0_SHIFT);
+ /* Xen: Match VTCR_EL2 SL0 attribute */
+ if (!stage1) {
+ u32 vtcr = READ_SYSREG32(VTCR_EL2);
+ reg |= vtcr & (TTBCR_SL0_MASK << TTBCR_SL0_SHIFT);
+ }
writel_relaxed(reg, cb_base + ARM_SMMU_CB_TTBCR);