]> xenbits.xensource.com Git - people/andrewcoop/xen.git/commitdiff
x86: FRED enumerations
authorAndrew Cooper <andrew.cooper3@citrix.com>
Fri, 18 Sep 2020 15:50:15 +0000 (16:50 +0100)
committerAndrew Cooper <andrew.cooper3@citrix.com>
Mon, 6 Jan 2025 14:19:10 +0000 (14:19 +0000)
xen/arch/x86/include/asm/msr-index.h
xen/arch/x86/include/asm/x86-defns.h
xen/include/public/arch-x86/cpufeatureset.h

index 601ac5521cb9fc4febf7b08757fd76fd5e4f2612..bb8a62c0edad0a95b8fc38714f11c4fdc763071f 100644 (file)
 #define  MCU_OPT_CTRL_GDS_MIT_DIS           (_AC(1, ULL) <<  4)
 #define  MCU_OPT_CTRL_GDS_MIT_LOCK          (_AC(1, ULL) <<  5)
 
+#define MSR_FRED_RSP_SL0                    0x000001cc
+#define MSR_FRED_RSP_SL1                    0x000001cd
+#define MSR_FRED_RSP_SL2                    0x000001ce
+#define MSR_FRED_RSP_SL3                    0x000001cf
+#define MSR_FRED_STK_LVLS                   0x000001d0
+#define MSR_FRED_SSP_SL0                    MSR_PL0_SSP
+#define MSR_FRED_SSP_SL1                    0x000001d1
+#define MSR_FRED_SSP_SL2                    0x000001d2
+#define MSR_FRED_SSP_SL3                    0x000001d3
+#define MSR_FRED_CONFIG                     0x000001d4
+
 #define MSR_RTIT_OUTPUT_BASE                0x00000560
 #define MSR_RTIT_OUTPUT_MASK                0x00000561
 #define MSR_RTIT_CTL                        0x00000570
index 2493ec277f58beed674f00db602fd5b402c58e92..ddc366fd6ea004814bdffdd21592a041a6782b80 100644 (file)
@@ -75,6 +75,7 @@
 #define X86_CR4_PKE        0x00400000 /* enable PKE */
 #define X86_CR4_CET        0x00800000 /* Control-flow Enforcement Technology */
 #define X86_CR4_PKS        0x01000000 /* Protection Key Supervisor */
+#define X86_CR4_FRED      0x100000000 /* Fast Return and Event Delivery */
 
 /*
  * XSTATE component flags in XCR0 | MSR_XSS
index 16207e3817bbb8c90cc791eb0ea2feffc93a2d16..c825475d7092714ae048a2c8a6643afe6ee68700 100644 (file)
@@ -307,7 +307,10 @@ XEN_CPUFEATURE(CMPCCXADD,    10*32+ 7) /*a  CMPccXADD Instructions */
 XEN_CPUFEATURE(FZRM,         10*32+10) /*A  Fast Zero-length REP MOVSB */
 XEN_CPUFEATURE(FSRS,         10*32+11) /*A  Fast Short REP STOSB */
 XEN_CPUFEATURE(FSRCS,        10*32+12) /*A  Fast Short REP CMPSB/SCASB */
+XEN_CPUFEATURE(FRED,         10*32+17) /*   Fast Return and Event Delivery */
+XEN_CPUFEATURE(LKGS,         10*32+18) /*   Load Kernel GS instruction */
 XEN_CPUFEATURE(WRMSRNS,      10*32+19) /*S  WRMSR Non-Serialising */
+XEN_CPUFEATURE(NMI_SRC,      10*32+20) /*   NMI-Source Reporting */
 XEN_CPUFEATURE(AMX_FP16,     10*32+21) /*   AMX FP16 instruction */
 XEN_CPUFEATURE(AVX_IFMA,     10*32+23) /*A  AVX-IFMA Instructions */