]> xenbits.xensource.com Git - xen.git/commitdiff
hvm: More changes to reduce size of domain structure.
authorKeir Fraser <keir@xensource.com>
Wed, 3 Oct 2007 15:33:23 +0000 (16:33 +0100)
committerKeir Fraser <keir@xensource.com>
Wed, 3 Oct 2007 15:33:23 +0000 (16:33 +0100)
It is now smaller than a page (4kB) on x86/32 and x86/64.
Signed-off-by: Keir Fraser <keir@xensource.com>
xen/arch/x86/hvm/hvm.c
xen/arch/x86/hvm/i8254.c
xen/arch/x86/hvm/vioapic.c
xen/include/asm-x86/hvm/domain.h
xen/include/asm-x86/hvm/vioapic.h
xen/include/asm-x86/hvm/vpt.h

index 9b45e5195c47377da8a946d2f8cb802b30445494..6f4a92445eea5f0032de1a8cc206358956ee3418 100644 (file)
@@ -232,7 +232,10 @@ int hvm_domain_initialise(struct domain *d)
         return rc;
 
     vpic_init(d);
-    vioapic_init(d);
+
+    rc = vioapic_init(d);
+    if ( rc != 0 )
+        return rc;
 
     hvm_init_ioreq_page(d, &d->arch.hvm_domain.ioreq);
     hvm_init_ioreq_page(d, &d->arch.hvm_domain.buf_ioreq);
@@ -254,6 +257,7 @@ void hvm_domain_relinquish_resources(struct domain *d)
 void hvm_domain_destroy(struct domain *d)
 {
     hvm_funcs.domain_destroy(d);
+    vioapic_deinit(d);
 }
 
 static int hvm_save_cpu_ctxt(struct domain *d, hvm_domain_context_t *h)
index d10b6ef2eea34fdfe77a3744ab37fbff365b74e8..5ca76f127604473c1b5cca5a2a6661f0f7f64faa 100644 (file)
@@ -185,7 +185,6 @@ static void pit_load_count(PITState *pit, int channel, int val)
 {
     u32 period;
     struct hvm_hw_pit_channel *s = &pit->hw.channels[channel];
-    struct periodic_time *pt = &pit->pt[channel];
     struct vcpu *v = vpit_vcpu(pit);
 
     ASSERT(spin_is_locked(&pit->lock));
@@ -207,16 +206,16 @@ static void pit_load_count(PITState *pit, int channel, int val)
     {
         case 2:
             /* Periodic timer. */
-            create_periodic_time(v, pt, period, 0, 0, pit_time_fired, 
+            create_periodic_time(v, &pit->pt0, period, 0, 0, pit_time_fired, 
                                  &pit->count_load_time[channel]);
             break;
         case 1:
             /* One-shot timer. */
-            create_periodic_time(v, pt, period, 0, 1, pit_time_fired,
+            create_periodic_time(v, &pit->pt0, period, 0, 1, pit_time_fired,
                                  &pit->count_load_time[channel]);
             break;
         default:
-            destroy_periodic_time(pt);
+            destroy_periodic_time(&pit->pt0);
             break;
     }
 }
@@ -396,7 +395,7 @@ static uint32_t pit_ioport_read(struct PITState *pit, uint32_t addr)
 void pit_stop_channel0_irq(PITState *pit)
 {
     spin_lock(&pit->lock);
-    destroy_periodic_time(&pit->pt[0]);
+    destroy_periodic_time(&pit->pt0);
     spin_unlock(&pit->lock);
 }
 
@@ -425,21 +424,18 @@ static void pit_info(PITState *pit)
         printk("pit 0x%x.\n", s->gate);
         printk("pit %"PRId64"\n", pit->count_load_time[i]);
 
-        pt = &pit->pt[i];
-        if ( pt )
-        {
-            printk("pit channel %d has a periodic timer:\n", i);
-            printk("pt %d.\n", pt->enabled);
-            printk("pt %d.\n", pt->one_shot);
-            printk("pt %d.\n", pt->irq);
-            printk("pt %d.\n", pt->first_injected);
-
-            printk("pt %d.\n", pt->pending_intr_nr);
-            printk("pt %d.\n", pt->period);
-            printk("pt %"PRId64"\n", pt->period_cycles);
-            printk("pt %"PRId64"\n", pt->last_plt_gtime);
-        }
     }
+
+    pt = &pit->pt0;
+    printk("pit channel 0 periodic timer:\n", i);
+    printk("pt %d.\n", pt->enabled);
+    printk("pt %d.\n", pt->one_shot);
+    printk("pt %d.\n", pt->irq);
+    printk("pt %d.\n", pt->first_injected);
+    printk("pt %d.\n", pt->pending_intr_nr);
+    printk("pt %d.\n", pt->period);
+    printk("pt %"PRId64"\n", pt->period_cycles);
+    printk("pt %"PRId64"\n", pt->last_plt_gtime);
 }
 #else
 static void pit_info(PITState *pit)
@@ -481,11 +477,9 @@ static int pit_load(struct domain *d, hvm_domain_context_t *h)
     /* Recreate platform timers from hardware state.  There will be some 
      * time jitter here, but the wall-clock will have jumped massively, so 
      * we hope the guest can handle it. */
+    pit->pt0.last_plt_gtime = hvm_get_guest_time(d->vcpu[0]);
     for ( i = 0; i < 3; i++ )
-    {
         pit_load_count(pit, i, pit->hw.channels[i].count);
-        pit->pt[i].last_plt_gtime = hvm_get_guest_time(d->vcpu[0]);
-    }
 
     pit_info(pit);
 
@@ -525,7 +519,7 @@ void pit_init(struct vcpu *v, unsigned long cpu_khz)
 void pit_deinit(struct domain *d)
 {
     PITState *pit = domain_vpit(d);
-    destroy_periodic_time(&pit->pt[0]);
+    destroy_periodic_time(&pit->pt0);
 }
 
 /* the intercept action for PIT DM retval:0--not handled; 1--handled */  
index c6faba349004c3cde829266cd4ca0703ed7589d9..bb8e178a312eced49712296b642cab58e7d75d03 100644 (file)
@@ -300,8 +300,7 @@ static uint32_t ioapic_get_delivery_bitmask(
 static inline int pit_channel0_enabled(void)
 {
     PITState *pit = &current->domain->arch.hvm_domain.pl_time.vpit;
-    struct periodic_time *pt = &pit->pt[0];
-    return pt->enabled;
+    return pit->pt0.enabled;
 }
 
 static void vioapic_deliver(struct hvm_hw_vioapic *vioapic, int irq)
@@ -517,13 +516,27 @@ static int ioapic_load(struct domain *d, hvm_domain_context_t *h)
 
 HVM_REGISTER_SAVE_RESTORE(IOAPIC, ioapic_save, ioapic_load, 1, HVMSR_PER_DOM);
 
-void vioapic_init(struct domain *d)
+int vioapic_init(struct domain *d)
 {
-    struct hvm_hw_vioapic *vioapic = domain_vioapic(d);
+    struct hvm_vioapic *vioapic;
     int i;
 
-    memset(vioapic, 0, sizeof(*vioapic));
+    vioapic = d->arch.hvm_domain.vioapic = xmalloc(struct hvm_vioapic);
+    if ( vioapic == NULL )
+        return -ENOMEM;
+
+    vioapic->domain = d;
+
+    memset(&vioapic->hvm_hw_vioapic, 0, sizeof(vioapic->hvm_hw_vioapic));
     for ( i = 0; i < VIOAPIC_NUM_PINS; i++ )
-        vioapic->redirtbl[i].fields.mask = 1;
-    vioapic->base_address = VIOAPIC_DEFAULT_BASE_ADDRESS;
+        vioapic->hvm_hw_vioapic.redirtbl[i].fields.mask = 1;
+    vioapic->hvm_hw_vioapic.base_address = VIOAPIC_DEFAULT_BASE_ADDRESS;
+
+    return 0;
+}
+
+void vioapic_deinit(struct domain *d)
+{
+    xfree(d->arch.hvm_domain.vioapic);
+    d->arch.hvm_domain.vioapic = NULL;
 }
index a2d565671c693242b65d033b7785d7c39bfac0b9..8946cab40c9fb98348c26fdce55a4cda9eca040f 100644 (file)
@@ -25,6 +25,7 @@
 #include <asm/hvm/irq.h>
 #include <asm/hvm/vpt.h>
 #include <asm/hvm/vlapic.h>
+#include <asm/hvm/vioapic.h>
 #include <asm/hvm/io.h>
 #include <asm/hvm/iommu.h>
 #include <public/hvm/params.h>
@@ -49,7 +50,7 @@ struct hvm_domain {
     spinlock_t             irq_lock;
     struct hvm_irq         irq;
     struct hvm_hw_vpic     vpic[2]; /* 0=master; 1=slave */
-    struct hvm_hw_vioapic  vioapic;
+    struct hvm_vioapic    *vioapic;
 
     /* hvm_print_line() logging. */
     char                   pbuf[80];
index 701bbdf36be8b4b8f01c173f9258c281354fcc4a..69ed31cdf77562b946200242f41a6a38aebb3106 100644 (file)
 #define VIOAPIC_REG_VERSION 0x01
 #define VIOAPIC_REG_ARB_ID  0x02 /* x86 IOAPIC only */
 
-#define domain_vioapic(d) (&(d)->arch.hvm_domain.vioapic)
-#define vioapic_domain(v) (container_of((v), struct domain, \
-                                        arch.hvm_domain.vioapic))
+struct hvm_vioapic {
+    struct hvm_hw_vioapic hvm_hw_vioapic;
+    struct domain *domain;
+};
 
-void vioapic_init(struct domain *d);
+#define domain_vioapic(d) (&(d)->arch.hvm_domain.vioapic->hvm_hw_vioapic)
+#define vioapic_domain(v) (container_of((v), struct hvm_vioapic, \
+                                        hvm_hw_vioapic)->domain)
+
+int vioapic_init(struct domain *d);
+void vioapic_deinit(struct domain *d);
 void vioapic_irq_positive_edge(struct domain *d, unsigned int irq);
 void vioapic_update_EOI(struct domain *d, int vector);
 
index 2250adb8121f19b80513e1f4af30e104b70af046..1327235c6cd943237cae9cfab46584790da6a2fb 100644 (file)
@@ -95,8 +95,8 @@ typedef struct PITState {
     struct hvm_hw_pit hw;
     /* Last time the counters read zero, for calcuating counter reads */
     int64_t count_load_time[3];
-    /* irq handling */
-    struct periodic_time pt[3];
+    /* Channel 0 IRQ handling. */
+    struct periodic_time pt0;
     spinlock_t lock;
 } PITState;